MC68040RC40A Freescale Semiconductor, MC68040RC40A Datasheet - Page 287

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MC68040RC40A

Manufacturer Part Number
MC68040RC40A
Description
IC MICROPROCESSOR 32BIT 179-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68040RC40A

Processor Type
M680x0 32-Bit
Speed
40MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
179-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
FPTS, FPTE, FPTM—Collectively, these fields are referred to as the FPTEMP register
and normally contain the destination operand for dyadic operations converted to extended
precision. If the instruction specifies a packed decimal real source, bits 95–64 of the
operand reside in FPTM [31–00], and the FPTS, FPTE, and FPTM [63–32] fields are
undefined.
OPCLASS—This field refers to bits 15–13 of CMDREG1B. Note that CMDREG1B is
identical to the second word of a floating-point arithmetic instruction opcode.
STAG, DTAG—These 3-bit fields specify the data type of the source and destination
operands, respectively. STAG is undefined for a packed decimal real source operand. The
encodings for STAG and DTAG are as follows:
T—If set, this bit indicates that a post-instruction exception has occurred. Since only an
opclass 3 instruction can indicate a post-instruction exception, this bit indicates that the
exception is caused by an FMOVE OUT instruction.
WBTS, WBTE [15,14–00], WBTM [66,65–02,01,00], SBIT—These fields contain the
exception operand in internal data format for E3 exceptions. Collectively, these fields are
called the WBTEMP and are an image of the intermediate result. WBTM66 is the overflow
bit; WBTM1, WBTM0, and SBIT are the guard, round, and sticky bits, respectively.
MOTOROLA
000 = Normalized
001 = Zero
010 = Infinity
011 = NAN
100 = Extended-Precision Denormalized or Unnormalized Input
101 = Single- or Double-Precision Denormalized Input
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
M68040 USER’S MANUAL
9- 43

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