MC68030FE20C Freescale Semiconductor, MC68030FE20C Datasheet - Page 309

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MC68030FE20C

Manufacturer Part Number
MC68030FE20C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68030FE20C

Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Manufacturer
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Price
Part Number:
MC68030FE20C
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SMARTASIC
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Part Number:
MC68030FE20C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
9
9.1.1 T r a n s l a t i o n
9-8
The translation control register (TC) defines the size of pages in memory,
selects the root pointer register to be used for supervisor accesses, indicates
whether the top level of the translation tree is indexed by function code, and
the size of the logical address space; it contains the number of most signif-
the other hand, if the IS field is set to 15, the logical address space contains
specifies the number of logical address bits used to index into the various
ample, if the IS field is set to zero, the logical address space is 232 bytes. On
only 2 32-215 bytes.
levels of the translation tree. The initial shift (IS) field of the TC register defines
icant address bits that are ignored in the translation table lookup. For ex-
I
EXAMPLEAODRESS$OOAO1AO0 I0 0 0 0 0 0 0 0 1 0 1
ROOT POINTER
Figure 9-5. Example Translation Tree Layout in Memory
C o n t r o l
J
MC68030 USER'S MANUAL
$A
A
SIO000 I
$14000
$37000
SLOO281
$17FFC [
$37018
0 1 0 0 0 0 0 0 0 1 1 0 1
I
I
I
I
I
~;oO~
$6
B
I
I
I
I
_
. . . . . . . . . .
A LEVEL TABLE
(4-BYTE ENTRIES)
B LEVEL TABLE $0
(4-BYTE ENTRIES)
O LEVEL TABLE $OOA
(4-BYTE ENTRIES)
I
PS
x
I
I
MOTOROLA
I

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