MC68306EH16B Freescale Semiconductor, MC68306EH16B Datasheet - Page 6

• Manufacturer Part Number: MC68306EH16B
• Description: IC MPU INTEGRATED 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68306EH16B

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Cpu Speed: 16.7MHz
• No. Of Timers: 1
• Embedded Interface Type: UART
• Digital Ic Case Style: PQFP
• Supply Voltage Range: 4.75V To 5.25V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Freescale Semiconductor, Inc.
DRAM CONTROLLER
DRAM is used in many systems, since it is the least expensive form of high-speed storage available.
However, considerable design effort is often spent designing the interface between the processor and
DRAM. The MC68306 contains a full DRAM controller, greatly reducing design time and complexity.
The DRAM controller provides RAS and CAS signals for two separate banks of DRAMs. Each bank can
include up to 16 devices; 15 multiplexed address lines are also available. Thus, using 4M x 1 DRAMs, up to
16 Mbytes of DRAM are supported; and with 16M x 1 DRAMs, up to 64 Mbytes of DRAM are supported. A
programmable refresh timer provides CAS-before-RAS refreshes at designated intervals.
The DRAM controller has its own address registers that control the address range selected by each RAS
and CAS signal, leaving the eight integrated chip selects free for other system peripherals. DRAM accesses
are 0 wait states using 80-ns DRAMs.
CHIP SELECTS
The MC68306 provides up to eight programmable chip select outputs, in most cases eliminating the need
for external address decoding. All handshaking and timing signals are provided, with up to 950-ns access
times. Each chip select can access a 16 Mbyte address space located anywhere in the 4-Gbyte address
range. Internal registers allow the base address, range, and cycle duration of each chip select to be
independently programmed. After reset, CS0 responds to all accesses until the chip selects have been
properly programmed. Four of the chip selects are multiplexed with the most significant address bits (A23–
A20). The AMODE input determines the functions of these outputs.
PARALLEL PORTS
Two 8-bit parallel ports are provided. The port pins can be individually programmed to be inputs or outputs.
If the pins are programmed to be inputs, the value on those pins can be read by accessing an on-board
register. If the pins are programmed to be outputs, the pins will reflect the value programmed into another
on-board register. The port B pins are multiplexed with four interrupt request and four interrupt acknowledge
lines. The function of these pins is controlled by the internal registers.
INTERRUPT CONTROLLER
Seven input signals are provided to trigger an external interrupt, one for each of the seven priority levels
supported. Each input can be programmed to be active high or active low. Seven separate outputs indicate
the priority level of the interrupt being serviced. Interrupts at each priority level can be pre-programmed to go
to the default service routine. For maximum flexibility, interrupts can be vectored to the correct service
routine by the interrupting device.
CLOCK
To save on system costs, the MC68306 has an on-board oscillator that can be driven with a 16.67 MHz
crystal. A bus clock output is provided by a CLKOUT pin. Alternatively, an external 16.67 MHz oscillator can
be used, with a tight skew between the input clock signal and the bus clock on the CLKOUT pin.
BUS WATCHDOG TIMER
A bus watchdog timer is provided to automatically terminate and report as erroneous any bus cycle that is
not normally terminated after a pre-programmed length of time. The user can program this timeout period to
be up to 4096 clocks.
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MC68306 PRODUCT INFORMATION
MOTOROLA
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