IDT79RV4640-180DU IDT, Integrated Device Technology Inc, IDT79RV4640-180DU Datasheet - Page 4

• Manufacturer Part Number: IDT79RV4640-180DU
• Description: IC SGL BOARD COMPUTER 128-QFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT79RV4640-180DU

• Processor Type: RISC 64-Bit
• Speed: 180MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 79RV4640-180DU

System Control Coprocessor (CP0)
sible for the virtual to physical address translation and cache protocols,
the exception control system, and the diagnostics capability of the
processor. In the MIPS architecture, the system control coprocessor
(and thus the kernel software) is implementation dependent.
have been implemented. These changes are designed to simplify
memory management, facilitate debug, and speed real-time processing.
System Control Coprocessor Registers
registers on-chip. These registers provide the path through which the
virtual memory system’s address translation is controlled, exceptions
are handled, and operating modes are controlled (kernel vs. user mode,
interrupts enabled or disabled, cache features). In addition, the RC4640
includes registers to implement a real-time cycle counting facility, which
aids in cache diagnostic testing, assists in data error detection, and facil-
itates software debug. Alternatively, this timer can be used as the
operating system reference timer, and can signal a periodic interrupt.
0
1
2
3
4-7, 10, 20-25,
29, 31
8
9
11
12
13
14
15
16
17
18
19
26
27
28
30
Number
IDT79RC4640™
The system control coprocessor in the MIPS architecture is respon-
In the RC4640, significant changes in CP0 relative to the RC4600
The RC4640 incorporates all system control co-processor (CP0)
Table 3 shows the CP0 registers of the RC4640.
IBase
IBound
DBase
DBound
-
BadVAddr
Count
Compare
Status
Cause
EPC
PRId
Config
CAlg
IWatch
DWatch
ECC
CacheErr
TagLo
ErrorEPC
Name
Table 3 RC4640 CPO Registers
Instruction address space base
Instruction address space bound
Data address space base
Data address space bound
Not used
Virtual address on address exceptions
Counts every other cycle
Generate interrupt when Count = Compare
Miscellaneous control/status
Exception/Interrupt information
Exception PC
Processor ID
Cache and system attributes
Cache attributes for the 8 512MB regions of the
virtual address space
Instruction breakpoint virtual address
Data breakpoint virtual address
Used in cache diagnostics
Cache diagnostic information
Cache index information
CacheError exception PC
Function
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Operation Modes
kernel mode. Kernel mode operation is typically used for exception
handling and operating system kernel functions, including CP0 manage-
ment and access to IO devices. In kernel mode, software has access to
the entire address space and all of the co-processor 0 registers, and
can select whether to enable co-processor 1 accesses. The processor
enters kernel mode at reset, and whenever an exception is recognized.
accesses are limited to a subset of the virtual address space, and can
be inhibited from accessing CP0 functions.
Virtual-to-Physical Address Mapping
The 4 GB address space is divided into addresses accessible in either
kernel or user mode (kuseg), and addresses only accessible in kernel
mode (kseg2:0).
common virtual addresses, but mapped to separate physical addresses.
This facility is implemented via the “base-bounds” registers contained in
CP0.
fetch), the RC4640 compares the virtual address with the contents of
the appropriate “bounds” register (instruction or data). If the virtual
0xFFFFFFFF
0xC0000000
0xBFFFFFFF
0xA0000000
0x9FFFFFFF
0x80000000
0x7FFFFFF
0x00000000
The RC4640 supports two modes of operation: user mode and
User mode is typically used for applications programs. User mode
The 4GB virtual address space of the RC4640 is shown in Figure 1.
The RC4640 supports the use of multiple user tasks sharing
When a user virtual address is asserted (load, store, or instruction
Figure 1 Mode Virtual Addressing (32-bit mode)
Kernel virtual address space
(kseg2)
Unmapped, 1.0 GB
Uncached kernel physical address space
(kseg1)
Unmapped, 0.5GB
Cached kernel physical address space
(kseg0)
Unmapped, 0.5GB
User virtual address space
(useg)
Mapped, 2.0GB
December 5, 2008