SL811S Cypress Semiconductor Corp, SL811S Datasheet - Page 13

• Manufacturer Part Number: SL811S
• Description: IC USB SLAVE CTRLR 28PLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of SL811S

• Applications: USB Host/Slave Controller
• Controller Series: USB-Hosts
• Ram Size: 256 x 8
• Interface: USB
• Number Of I /o: 8
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 65°C
• Mounting Type: Surface Mount
• Package / Case: 28-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Core Processor: -
• Program Memory Type: -
• Other names: 428-1460

Bit 5. USB Speed select. ‘0’ sets the USB Speed for Full Speed (12 MHz). ‘1’ sets the USB for Low Speed 1.5 MHz operation.
Bit 6. ‘1’ sets the USB Transceiver for low power operation. Suspend Mode (Low power operation) is entered when Bit 6 is set
= ‘1’ and Bit 0 (USB Enable) is set = ‘0’.
5.4.2
The SL811S/T provides an Interrupt Request Output that is activated resulting from a number of conditions. The Interrupt Enable
Register allows the user to select activities that will generate the Interrupt Request. A separate Interrupt Status Register is
provided. It can be read in order to determine the condition that initiated the interrupt. (See Interrupt Status Register description).
When a bit is set to '1', the corresponding interrupt is enabled.
5.4.3
Contains USB Device Address after assignment by USB Host during
is set to Address 00H. After USB configuration and address assignment, the device will recognize only USB transactions directed
to the address contained in the USB Address Register.
5.4.4
This Read/Write register serves as an Interrupt status register when it is read, and an Interrupt clear register when it is written.
To clear an interrupt bit, the register must be written with the appropriate bit set to '1'. Writing a '0' has no effect on the status.
Document #: 38-08009 Rev. **
Bit Position
Bit Position
JK-Force State
Interrupt Enable Register, Address [06h]
USB Address Register, Address [07h]
Interrupt Status Register, Address [0Dh]
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
0
1
1
Endpoint 0 Done
Endpoint 1 Done
Endpoint 2 Done
Endpoint 3 Done
Endpoint 0 Done
Endpoint 1 Done
Endpoint 2 Done
Endpoint 3 Done
SOF Received
SOF Received
DMA Status
DMA Status
USB Reset
USB Reset
DMA Done
DMA Done
Bit Name
Bit Name
USB Engine Reset
0
1
0
1
Enable Endpoint 0 done Interrupt
Enable Endpoint 1 done Interrupt
Enable Endpoint 2 done Interrupt
Enable Endpoint 3 done Interrupt
Enable DMA done Interrupt
Enable SOF Received Interrupt
Enable USB Reset received interrupt.
When “1”, indicates DMA transfer in progress; When “0”, indicates DMA
transfer is complete.*
Endpoint 0 done Interrupt
Endpoint 1 done Interrupt
Endpoint 2 done Interrupt
Endpoint 3 done Interrupt
DMA done Interrupt
SOF Received Interrupt
USB Reset received interrupt.
When “1”, indicates DMA transfer in progress; When “0”, indicates DMA
transfer is complete. An interrupt is not generated when DMA is complete.
Normal operating mode
Force SE0, D+ and D– are set low
Force K-State, D– set high, D+ set low
Force J-State, D+ set high, Dq– set low
configuration. On power up or Reset, USB Address Register
Function
Function
Function
SL811S/T
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