EP2S15F672I4N Altera, EP2S15F672I4N Datasheet - Page 60

IC STRATIX II FPGA 15K 672-FBGA

EP2S15F672I4N

Manufacturer Part Number
EP2S15F672I4N
Description
IC STRATIX II FPGA 15K 672-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S15F672I4N

Number Of Logic Elements/cells
15600
Number Of Labs/clbs
780
Total Ram Bits
419328
Number Of I /o
366
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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PLLs & Clock Networks
Figure 2–35. EP2S15 & EP2S30 Device I/O Clock Groups
2–52
Stratix II Device Handbook, Volume 1
IO_CLKH[7:0]
IO_CLKG[7:0]
8
8
8
IOE clocks have row and column block regions that are clocked by eight
I/O clock signals chosen from the 24 quadrant clock resources.
Figures 2–35
regions.
the Quadrant
the Quadrant
24 Clocks in
24 Clocks in
IO_CLKA[7:0]
IO_CLKF[7:0]
and
8
2–36
show the quadrant relationship to the I/O clock
IO_CLKB[7:0]
IO_CLKE[7:0]
8
the Quadrant
the Quadrant
24 Clocks in
24 Clocks in
8
Altera Corporation
8
8
I/O Clock Regions
IO_CLKC[7:0]
IO_CLKD[7:0]
May 2007

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