EPF10K50VRC240-4N Altera, EPF10K50VRC240-4N Datasheet - Page 18

• Manufacturer Part Number: EPF10K50VRC240-4N
• Description: IC FLEX 10KV FPGA 50K 240-RQFP
• Manufacturer: Altera
• Series: FLEX-10K®r

Specifications of EPF10K50VRC240-4N

• Number Of Logic Elements/cells: 2880
• Number Of Labs/clbs: 360
• Total Ram Bits: 20480
• Number Of I /o: 189
• Number Of Gates: 116000
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 240-RQFP
• Family Name: FLEX 10K
• Number Of Usable Gates: 50000
• Number Of Logic Blocks/elements: 2880
• # I/os (max): 189
• Frequency (max): 125MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 3.3V
• Logic Cells: 2880
• Ram Bits: 20480
• Device System Gates: 116000
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: RQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
LE Operating Modes
The FLEX 10K LE can operate in the following four modes:
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. Three inputs to the
LE provide clock, clear, and preset control for the register. The Altera
software, in conjunction with parameterized functions such as LPM and
DesignWare functions, automatically chooses the appropriate mode for
common functions such as counters, adders, and multipliers. If required,
the designer can also create special-purpose functions which use a specific
LE operating mode for optimal performance.
The architecture provides a synchronous clock enable to the register in all
four modes. The Altera software can set DATA1 to enable the register
synchronously, providing easy implementation of fully synchronous
designs.
Figure 9
Normal mode
Arithmetic mode
Up/down counter mode
Clearable counter mode
shows the LE operating modes.
Altera Corporation