ADSP-21992BST Analog Devices Inc, ADSP-21992BST Datasheet - Page 51

• Manufacturer Part Number: ADSP-21992BST
• Description: IC DSP CONTROLLER 16BIT 176LQFP
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-21992BST

• Rohs Status: RoHS non-compliant
• Interface: SPI, SSP
• Clock Rate: 160MHz
• Non-volatile Memory: External
• On-chip Ram: 128kB
• Voltage - I/o: 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 176-LQFP

TEST CONDITIONS
The DSP is tested for output enable, disable, and hold time.
OUTPUT DISABLE TIME
Output pins are considered to be disabled when they stop driv-
ing, go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by ΔV is dependent on the capacitive load, C
load current, I
following equation.
The output disable time t
t
SURED
when the output voltage decays ΔV from the measured output
high or output low voltage. The t
loads C
MEASURED
Figure 20. Equivalent Device Loading for AC Measurements (Includes All
is the interval from when the reference signal switches to
L
REFERENCE
V
V
and I
OH (MEASURED)
OL (MEASURED)
and t
SIGNAL
OUTPUT
L
L
, and with ΔV equal to 0.5 V.
. This decay time can be approximated by the
DECAY
PIN
TO
Figure 19. Output Enable/Disable
t
DIS
OUTPUT STOPS
50pF
as shown in
DRIVING
t
DECAY
DIS
Fixtures)
is the difference between
t
TEST CONDITIONS CAUSE THIS VOLTAGE
MEASURED
=
V
V
t
DECAY
OH (MEASURED)
OL (MEASURED)
DECAY
TO BE APPROXIMATELY 1.5V
C
------------- -
I
HIGH IMPEDANCE STATE.
I
Figure
OL
OH
L
I
Δ
L
V
is calculated with test
19. The time t
+ V 1.0V
– V 2.0V
OUTPUT STARTS
1.5V
t
ENA
DRIVING
Rev. A | Page 51 of 60 | August 2007
L
, and the
MEA-
OUTPUT ENABLE TIME
Output pins are considered to be enabled when they have made
a transition from a high impedance state to when they start driv-
ing. The output enable time t
reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram
pins (such as the data bus) are enabled, the measurement value
is that of the first pin to start driving.
EXAMPLE SYSTEM HOLD TIME CALCULATION
To determine the data output hold time in a particular system,
first calculate t
on Page
voltage of the ADSP-21992 and the input threshold for the
device requiring the hold time. A typical ΔV will be 0.4 V. C
the total bus capacitance (per data line), and I
age or three-state current (per data line). The hold time will be
t
write cycle).
DECAY
Figure 21. Voltage Reference Levels for AC Measurements (Except Output
plus the minimum disable time (i.e., t
51. Choose ΔV to be the difference between the output
OUTPUT
INPUT
OR
DECAY
using the equation at
1.5V
Enable/Disable)
ENA
is the interval from when a
(Figure
Output Disable Time
ADSP-21992
1.5V
DATRWH
L
19). If multiple
is the total leak-
for the
L
is