DSP56303AG100R2 Freescale Semiconductor, DSP56303AG100R2 Datasheet - Page 104

• Manufacturer Part Number: DSP56303AG100R2
• Description: IC DSP 24BIT 100MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56303AG100R2

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Power Consumption Benchmark
A-14
M_BRP EQU 23
;
M_BAT EQU $3
M_BAAP EQU 2
M_BPEN EQU 3
M_BXEN EQU 4
M_BYEN EQU 5
M_BAM EQU 6
M_BPAC EQU 7
M_BNC EQU $F00
M_BAC EQU $FFF000
;
M_CP EQU $c00000
M_CA EQU 0
M_V EQU 1
M_Z EQU 2
M_N EQU 3
M_U EQU 4
M_E EQU 5
M_L EQU 6
M_S EQU 7
M_I0 EQU 8
M_I1 EQU 9
M_S0 EQU 10
M_S1 EQU 11
M_SC EQU 13
M_DM EQU 14
M_LF EQU 15
M_FV EQU 16
M_SA EQU 17
M_CE EQU 19
M_SM EQU 20
M_RM EQU 21
M_CP0 EQU 22
M_CP1 EQU 23
;
M_CDP EQU $300
M_MA
M_MB
M_MC
M_MD
M_EBD EQU 4
M_SD EQU 6
M_MS EQU 7
M_CDP0 EQU 8
M_CDP1 EQU 9
M_BEN
M_TAS
M_BRT
M_ATE EQU 15
M_XYS EQU 16
M_EUN EQU 17
M_EOV EQU 18
M_WRP EQU 19
equ1
EQU 11
EQU 12
Address Attribute Registers
control and status bits in SR
control and status bits in OMR
equ0
equ2
equ3
EQU 10
DSP56303 Technical Data, Rev. 11
; Refresh prescaler
; Ext. Access Type and Pin Def. Bits Mask (BAT0-BAT1)
; Address Attribute Pin Polarity
; Program Space Enable
; X Data Space Enable
; Y Data Space Enable
; Address Muxing
; Packing Enable
; Number of Address Bits to Compare Mask (BNC0-BNC3)
; Address to Compare Bits Mask (BAC0-BAC11)
; mask for CORE-DMA priority bits in SR
; Carry
; Overflow
; Zero
; Negative
; Unnormalized
; Extension
; Limit
; Scaling Bit
; Interupt Mask Bit 0
; Interupt Mask Bit 1
; Scaling Mode Bit 0
; Scaling Mode Bit 1
; Sixteen_Bit Compatibility
; Double Precision Multiply
; DO-Loop Flag
; DO-Forever Flag
; Sixteen-Bit Arithmetic
; Instruction Cache Enable
; Arithmetic Saturation
; Rounding Mode
; bit 0 of priority bits in SR
; bit 1 of priority bits in SR
; mask for CORE-DMA priority bits in OMR
; Operating Mode A
; Operating Mode B
; Operating Mode C
; Operating Mode D
; External Bus Disable bit in OMR
; Stop Delay
; Memory Switch bit in OMR
; bit 0 of priority bits in OMR
; bit 1 of priority bits in OMR
; Burst Enable
; TA Synchronize Select
; Bus Release Timing
; Address Tracing Enable bit in OMR.
; Stack Extension space select bit in OMR.
; Extensed stack UNderflow flag in OMR.
; Extended stack OVerflow flag in OMR.
; Extended WRaP flag in OMR.
Freescale Semiconductor