XC95144-10PQ100I Xilinx Inc, XC95144-10PQ100I Datasheet - Page 9

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XC95144-10PQ100I

Manufacturer Part Number
XC95144-10PQ100I
Description
IC CPLD 144 MCELL I-TEMP 100PQFP
Manufacturer
Xilinx Inc
Series
XC9500r
Datasheets

Specifications of XC95144-10PQ100I

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Logic Elements/blocks
8
Number Of Macrocells
144
Number Of Gates
3200
Number Of I /o
81
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-MQFP, 100-PQFP
Voltage
5V
Memory Type
FLASH
Package
100PQFP
Family Name
XC9500
Device System Gates
3200
Number Of Macro Cells
144
Maximum Propagation Delay Time
10 ns
Number Of User I/os
81
Number Of Logic Blocks/elements
8
Typical Operating Supply Voltage
5 V
Maximum Operating Frequency
66.7 MHz
Number Of Product Terms Per Macro
90
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Number Of Logic Elements/cells
-

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The internal logic of the product term allocator is shown in
Figure
DS063 (v5.5) June 25, 2007
Product Specification
8.
R
From Lower
From Upper
Macrocell
Macrocell
Figure 8: Product Term Allocator Logic
To Lower
Macrocell
Macrocell
To Upper
www.xilinx.com
Product Term
Allocator
XC9500 In-System Programmable CPLD Family
Product Term Set
Product Term Clock
Product Term Reset
Product Term OE
1
0
Global Set/Reset
Global Set/Reset
Global Clocks
D/T
DS063_08_110501
S
R
Q
9

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