ATF1504AS-7AX100 Atmel, ATF1504AS-7AX100 Datasheet - Page 14

IC CPLD 7NS 100TQFP

ATF1504AS-7AX100

Manufacturer Part Number
ATF1504AS-7AX100
Description
IC CPLD 7NS 100TQFP
Manufacturer
Atmel
Series
ATF1504AS(L)r
Datasheet

Specifications of ATF1504AS-7AX100

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Macrocells
64
Number Of I /o
64
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
5V
Memory Type
EEPROM
Family Name
ATF1504AS
# Macrocells
64
Number Of Usable Gates
1500
Frequency (max)
166.7MHz
Propagation Delay Time
7.5ns
Number Of Logic Blocks/elements
4
# I/os (max)
64
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
For Use With
ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Number Of Logic Elements/cells
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATF1504AS-7AX100
Manufacturer:
Atmel
Quantity:
10 000
AC Characteristics (Continued)
Notes:
Input Test Waveforms and Measurement Levels
t
14
R
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
, t
ZX1
ZX2
ZX3
XZ
SU
H
FSU
FH
RD
COMB
IC
EN
GLOB
PRE
CLR
UIM
RPA
F
= 1.5 ns typical
1. See ordering information for valid part numbers.
2. The t
ATF1504AS(L)
power mode.
Parameter
Output Buffer Enable Delay
(Slow slew rate = OFF;
V
Output Buffer Enable Delay
(Slow slew rate = OFF;
V
Output Buffer Enable Delay
(Slow slew rate = ON;
V
Output Buffer Disable Delay
(C
Register Setup Time
Register Hold Time
Register Setup Time of Fast Input
Register Hold Time of Fast Input
Register Delay
Combinatorial Delay
Array Clock Delay
Register Enable Time
Global Control Delay
Register Preset Time
Register Clear Time
Switch Matrix Delay
Reduced-power Adder
CCIO
CCIO
CCIO
L
= 5 pF)
RPA
= 5.0V; C
= 3.3V; C
= 5.0V/3.3V; C
parameter must be added to the t
L
L
= 35 pF)
= 35 pF)
L
= 35 pF)
(2)
Min
0.5
3
2
3
LAD
-7
, t
Max
4.0
4.5
10
9
4
1
1
3
3
1
2
2
1
LAC
,t
TIC
Min
0.5
, t
3
3
3
ACL
-10
, and t
Max
5.0
5.5
11
9
5
2
2
5
5
1
3
3
1
SEXP
Min
2
4
4
2
parameters for macrocells running in the reduced-
-15
Max
10
13
7
7
6
1
1
6
6
1
4
4
2
Min
5
5
2
2
-20
Max
11
14
9
9
7
2
2
7
7
1
5
5
2
Min
2.5
6
6
3
-25
Max
10
10
12
15
0950O–PLD–7/05
8
2
2
8
8
1
6
6
2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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