ATS675LSETN-HT-T Allegro, ATS675LSETN-HT-T Datasheet - Page 10

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ATS675LSETN-HT-T

Manufacturer Part Number
ATS675LSETN-HT-T
Description
Manufacturer
Allegro

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ATS675LSE
to attain the specified output voltage polarity at power-on, in
relation to the target feature nearest the device at that time. The
TPOS switchpoint is programmed by Allegro to the datasheet
specifications.
Start-Up Detection
The ATS675 provides an output polarity transition at the first
target mechanical edge that is opposite the device after power-on.
Calibration
The Automatic Gain Calibration (AGC) feature is implemented
by a unique patented self-calibrating circuitry. After each power-
on, the device measures the peak-to-peak magnetic signal. The
gain of the sensor is then adjusted, keeping the internal signal,
V
the device. This feature ensures that operational characteristics
are isolated from the effects of changes in effective air gap. The
Initial Calibration process allows the peak detecting DACs to
properly acquire the magnetic signal, so that a Running Mode
switchpoint can be accurately computed.
TPOS to Running Mode
After the Initial Calibration process is completed (CAL
device transitions to Running Mode. As shown in figure 9, the
device dynamically adjusts the relative edge position from the
TPOS edge location to the Running Mode location over several
target teeth (C
Figure 9. Startup calibration order
Switch State
Switch State
LT option
HT option
PROC
, at a constant amplitude throughout the air gap range of
V
V
OUT
OUT
TPORM
Power-on
0n
0ff 0n
0ff
CAL
), significantly reducing the maximum tim-
I
CAL
TPOSRM
Optimized for Automotive Cam Sensing Applications
Running Mode
I
TPOS
Threshold
), the
B
ST
Self-Calibrating TPOS Speed Sensor
ing accuracy step size during startup conditions. A single large
jump in edge position is not allowed; instead, any change in edge
position from TPOS to Running Mode is spread over several
output transitions.
Switchpoints
The Running Mode switchpoints in the ATS675 are established
dynamically as a percentage of the amplitude of the signal,
V
peaks of V
The switching threshold is established at a fixed percentage of the
values held in the two DACs. The ATS675 uses a single switch-
ing threshold (operate and release points identical) with internal
hysteresis.
Internal Hysteresis
The Internal Hysteresis, B
various air gaps while maintaining immunity to false switching
on noise, vibration, backlash, or other transient events. Figure 10
demonstrates the function of this hysteresis when switching on an
anomalous peak.
Peak and Valley DAC Update
The peak and valley DACs have an algorithm that allows track-
ing of drift over temperature changes, but provides immunity to
target particularities, such as small mechanical valleys.
Figure 10. Output switching can accommodate an anomalous peak, such
as the middle peak in this figure, by using the Internal Hysteresis value.
PROC
Switch State
Switch State
LT option
HT option
, after normalization with AGC. Two DACs track the
PROC
V
V
OUT
OUT
.
0n
0ff
HYS
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
B
, provides high performance over
ST
B
0ff
0n
HYS
B
HYS
10

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