NL3224BC35-20 NEC Electronics, NL3224BC35-20 Datasheet - Page 17

• Manufacturer Part Number: NL3224BC35-20
• Manufacturer: NEC Electronics

Specifications of NL3224BC35-20

• Lead Free Status / Rohs Status: Not Compliant

4.9 INPUT SIGNAL TIMINGS FOR LCD PANEL SIGNAL PROCESSING BOARD
4.9.1 Outline of QVGA input signal timings
• Horizontal signal
• Vertical signal
Display period
Display period
(Fixed mode)
(Fixed mode)
Note1: Fixed mode cannot be used while working of DE mode.
Note2: This diagram indicates virtual signal for set up to timing.
Note3: Customer should be inputted synchronized signals (Hsync, Vsync) in addition to DE
Note1: Fixed mode cannot be used while working of DE mode.
Note2: This diagram indicates virtual signal for set up to timing.
Note3: Customer should be inputted synchronized signals (Hsync, Vsync) in addition to DE
Note4: See "4.9.3 Detailed QVGA input signal timing chart for fixed mode" and "4.9.4 Detailed
Data enable
Data enable
(DE mode)
(DE mode)
Note2
Hsync
Note1
Note2
Note3
Vsync
Note1
Note3
signal to this product, when it is worked in DE mode. Synchronized signals are used for
DE/Fixed mode detection.
signal to this product, when it is worked in DE mode. Synchronized signals are used for
DE/Fixed mode detection.
QVGA input signal timing chart for DE mode" for numeration of pulse.
DATA SHEET EN0556EJ3V0DS00
1
Horizontal synchronizing pulse width (thp)
Vertical synchronizing pulse width (tvp)
Horizontal back-porch (thb)
Vertical back-porch (tvb)
2
Horizontal synchronizing cycle (th)
Horizontal display period (thd)
Vertical synchronizing cycle (tv)
Vertical display period (tvd)
3
4
Horizontal front-porch (thf)
Vertical front-porch (tvf)
240
NL3224BC35-20
Note4
17