AD537SD/883B Analog Devices Inc, AD537SD/883B Datasheet - Page 5

• Manufacturer Part Number: AD537SD/883B
• Manufacturer: Analog Devices Inc

Specifications of AD537SD/883B

• Converter Function: VFC
• Full Scale Frequency: 150
• Power Supply Requirement: Single/Dual
• Single Supply Voltage (typ): 5/9/12/15/18/24/28V
• Single Supply Voltage (max): 36V
• Single Supply Voltage (min): 4.5V
• Dual Supply Voltage (typ): ±9/±12/±15V
• Dual Supply Voltage (min): ±5V
• Dual Supply Voltage (max): ±18V
• Operating Temperature (min): -55
• Operating Temperature (max): 125C
• Operating Temperature Classification: Military
• Package Type: CDIP
• Lead Free Status / Rohs Status: Not Compliant

NONLINEARITY SPECIFICATION
The preferred method for specifying linearity error is in terms of
the maximum deviation from the ideal relationship after cali-
brating the converter at full scale and “zero”. This error will
vary with the full-scale frequency and the mode of operation.
The AD537 operates best at a 10 kHz full-scale frequency with
a negative voltage input; the linearity is typically within ± 0.05%.
Operating at higher frequencies or with positive inputs will
degrade the linearity as indicates in the Specification table. The
shape of a typical linearity plot is given in Figure 4.
Figure 4a. Typical Nonlinearity Error Envelopes with
10 kHz F.S. Output
Figure 4b. Typical Nonlinearity Error with 100 kHz F.S.
Output
OUTPUT INTERFACING CONSIDERATIONS
The design of the output stage allows easy interfacing to all digi-
tal logic families. The collector and emitter of the output NPN
transistor are both uncommitted; the emitter can be tied to any
voltage between –V
can be pulled up to a voltage 36 volts above the emitter regard-
less of +V
20 mA (10 mA for “H” package) at a maximum saturation volt-
age of 0.4 volts. The stage limits the output current at 25 mA; it
can handle this limit indefinitely without damaging the device.
REV. C
–0.02
–0.04
–0.06
–0.08
–0.02
–0.04
–0.06
–0.08
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
S
. The high power output stage can supply up to
0
0
10
1
TEST CONDITIONS:
+V
–V
C
R
V
POS INPUT – FIG. 3
NEG INPUT – FIG. 4
TEST CONDITIONS:
+V
–V
C
R
V
POS INPUT – FIG. 3
NEG INPUT – FIG. 4
FS
T
T
T
T
FS
S
S
S
S
= 0.01µF
= 10kΩ
= 0.001µF
= 10kΩ
= 0V
= ±10V
= 0V
= ±10V
= +15V
= +15V
S
and 4 volts below +V
100
10
OUTPUT FREQUENCY – Hz
OUTPUT FREQUENCY – Hz
100
1k
AD537K, S
AD537J
AD537K, S
S
. The open collector
10k
1k
AD537J
100k
10k
–5–
Figure 5 shows the AD537 with a standard 0 to +10 volt input
connection and the output stage connections. The values for the
logic common voltage, pull-up resistor, positive logic level, and
–V
forms.
APPLICATIONS
The diagrams and descriptions of the following applications are
provided to stimulate the discerning engineer with alternative
circuit design ideas. “Applications of the AD537 IC Voltage-
to-Frequency Converter”, available from Analog Devices on
request, covers a wider range of topics and concepts in data
conversion and data transmission using voltage-to-frequency
converters.
TRUE TWO-WIRE DATA TRANSMISSION
Figure 6 shows the AD537 in a true two-wire data transmission
scheme. The twisted-pair transmission lines serves the dual pur-
pose of supplying power to the device and also carrying fre-
quency data in the form of current modulation. The PNP circuit
at the receiving end represents a fairly simple way for converting
the current modulation back into a voltage square wave which
will drive digital logic directly. The 0.6 volt square wave which
will appear on the supply line at the device terminals does not
affect the performance of the AD537 because of its excellent
supply rejection. Also, note that the circuit operates at nearly
constant average power regardless of frequency.
V
10k
IN
R
S
+V
CAL
V
V
supply are given in the accompanying chart for several logic
IN
TEMP
IN
Figure 5. Interfacing Standard Logic Families
R
SCALE
3
2
V
4
6
7
1
2
3
5
REF
Figure 6. True Two-Wire Operation
4
(CONNECTED TO CASE)
1
V
V
BUF
T
R
AD537
V
V
BUF
T
R
REFERENCE
PRECISION
VOLTAGE
REFERENCE
PRECISION
VOLTAGE
–V
TO-FREQ
10
DRIVER
TO-FREQ
CURR-
5
CONV
DRIVER
S
CURR-
CONV
AD537
LOGIC
GND
6
9
14
13
12
11
10
9
8
R
8
7
L
V
20k
C
–V
+V
OS
R
C
L
S
S
V
+5
+15
TWO-WIRE
S
TTL/DTL
5V CMOS
15V CMOS/
HNIL
ECL 10k
ECL2.5k
PMOS
LINK
R
0
1k
LOGIC COM
V
f
LOGIC V
+V
(+15V)
OUT
S
EE
S
R
1k
3.3k
L
220Ω
V
+5
+5
+15
0
+1.3
0
120
AD537
CC
CC
R
S
V
GND
GND
GND
–8
–2
–15
EE
R
5k
20k
10k
5k
5k
10k
L
+V
OUTPUT
S
–V
GND
GND
GND
–8 TO
–15
–5
–15
S