NP3700PSCB-700 Applied Micro Circuits Corporation, NP3700PSCB-700 Datasheet - Page 2

• Manufacturer Part Number: NP3700PSCB-700
• Manufacturer: Applied Micro Circuits Corporation

Specifications of NP3700PSCB-700

• Lead Free Status / Rohs Status: Supplier Unconfirmed

nP3700
nP3700 Highlights
Interfaces
• Line Interfaces – cell and packet
• Support for Deep Channelization: for
• Fabric Interface: OIF SPI-4 Phase 2
• External Memory Interfaces:
(Line/CPU)
(Line/CPU)
nP3700
OC-1s, T3/E3s, T1/E1s, etc.
– 800 MHz
RLDRAM II memory controllers
– Payload Memory:
SPI3/UT3
GE
SPI3/UT3
QAB
QAB
Two banks of 36-bit RLDRAM II
operating at up to 250 MHz (32 Gbps
with ECC)
SPI-3/UT-3
2
NPF(QDR)
NPF(QDR)
Interfaces
Interfaces
18
18
16-bit
GE
Engine
Engine
1
Policy
Policy
(CSM)
(CSM)
FE/GE
FE/GE
MACs
MACs
Line
Line
HOST CPU
HOST CPU
SPI-4.2
1
36
36
3 nPcores @ 700 MHz
QDR
QDR
Statistics
Statistics
SPU
SPU
nPcore @ 700 MHz
nPcore @ 700 MHz
Engine
Engine
• CPU Interfaces: PowerPC and Gigabit
• External Search Interface
• Debug port
• JTAG port
36
36
– Context Memory:
– Channel Service Memory:
– Flow Database Memory:
Ethernet
– Compliant with NPF
– Backward compatibility mode with
Packet Transform
Packet Transform
Two banks of 36-bit RLDRAM II
operating at up to 250 MHz (32 Gbps
with ECC)
One bank of 36-bit QDR-II SRAM
operating at up to 250 MHz
Two banks of 18-bit QDR-II SRAM
operating at up to 250 MHz
existing TCAMs
72 Tasks
nP3700 Block Diagram
24 Tasks
24 Tasks
Memory Access Unit
Memory Access Unit
Engine
Engine
Cache
DRAM/SRAM
(PTE)
(PTE)
DEBUG
XSC
XMI
DEBUG
36
36
RLDRAM
36
36
Engine
Engine
Hash
Hash
FCN
36
36
Soft TM
Soft TM
High Performance nPcore
• Three nPcores at up to 700 MHz
Integrated Coprocessors
• Policy Engine for efficient packet
• Special Purpose Unit (SPU) for per-flow
• Hashing Unit
• On-Chip Debugger (OCD)
Integrated Traffic Manager
• Hierarchical Traffic Manager with
• Leverages field-proven nPX5710 and
Manager
Manager
classification
policing
fine-grained flow-based traffic
management
nPX5720 technology
DRAM
RLDRAM
Scheduling
Scheduling
Traffic
Traffic
Queuing
Queuing
36
36
JTAG
JTAG
Scratch
Scratch
Pad
Pad
SPI4.2
SPI4.2