21143TD Intel, 21143TD Datasheet - Page 15

• Manufacturer Part Number: 21143TD
• Manufacturer: Intel

Specifications of 21143TD

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / Rohs Status: Not Compliant

Preliminary
Datasheet
devsel_l
frame_l
gep<0>/
aui_bnc
gep<1>/activ
gep<2>/
rcv_match/
wake
gep<3>/link
Signal
Type
I/O
I/O
I/O
I/O
I/O
I/O
Table 4. Functional Description of 21143 Signals (Sheet 2 of 6)
Pin Number
100
101
102
103
55
50
Device select is asserted by the target of the current bus access.
When the 21143 is the initiator of the current bus access, it expects
the target to assert devsel_l within 5 bus cycles, confirming the
access. If the target does not assert devsel_l within the required bus
cycles, the 21143 aborts the cycle. To meet the timing requirements,
the 21143 asserts this signal in a medium speed (within 2 bus
cycles).
The frame_l signal is driven by the bus master to indicate the
beginning and duration of an access. The frame_l signal asserts to
indicate the beginning of a bus transaction. While frame_l is
asserted, data transfers continue. The frame_l signal deasserts to
indicate that the next data phase is the final data phase transaction.
This pin can be configured by software to be:
transceiver in 10BASE2 mode. When set, the 10BASE5 mode is
selected. When reset, the 10BASE2 mode is selected.
NOTE: This control pin is internally forced to the aui_bnc function
This pin can be configured by software to be:
If the PME_Enable bit (Func0_HwOptions<3>) in the serial ROM is
set, this pin is forced to function as a wake-up event pin that can be
connected to pin pme# of the PCI connector or pin cstschg of the
CardBus connector. When the 21143 is in remote wake-up-LAN
mode, this pin is used as an indicator that a Magic Packet* has been
successfully detected. When this pin is in a wake function, bit
MiscHwOptions<1> in the serial ROM determines the polarity. The
PME function takes precedence over the Magic Packet indication
function.
This pin can be configured by software to be:
This pin can be configured by software to be:
• A general-purpose pin that performs either input or output
• A control pin that provides an AUI (10BASE5) or BNC
• A general-purpose pin that performs either input or output
• A status pin that provides an LED that indicates either receive or
• A general-purpose pin that performs either input or output
• A status pin that provides an LED that indicates a receive packet
• A general-purpose pin that performs either input or output
• A status pin that provides an LED to indicate:
This control pin is mainly used to enable the external BNC
functions. This general-purpose pin can provide an interrupt
when functioning as an input.
(10BASE2) select line.
functions. This general-purpose pin can provide an interrupt
when functioning as an input.
transmit activity.
functions.
has passed address recognition.
functions. When configured as an input pin in OnNow mode, this
pin functions as link status. When used with an MII PHY device,
this pin should be connected to the MII PHY link indication pin
(the 21143 interprets link-pass when this pin is high). This pin
should not be left unconnected if it is configured as an input in
D1, D2 or D3 power states.
–Network link integrity state for 10BASE-T or 100BASE-TX if
Func1_Hw_Options<8> is cleared in the SROM.
–Both network activity and network link integrity state if
Func1_Hw_Options<8> is set in the SROM.
when the 21143 is in remote wake-up-LAN mode.
Description
21143
11