MAX5532EUA+ Maxim Integrated Products, MAX5532EUA+ Datasheet - Page 6

• Manufacturer Part Number: MAX5532EUA+
• Description: IC DAC 12BIT DUAL ULP 8-UMAX
• Manufacturer: Maxim Integrated Products

Specifications of MAX5532EUA+

• Settling Time: 660µs
• Number Of Bits: 12
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 471mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Resolution: 12 bit
• Interface Type: Serial (SPI)
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Current: 0.006 mA
• Voltage Reference: External
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Dual, Ultra-Low-Power,
12-Bit, Voltage-Output DACs
TIMING CHARACTERISTICS
(V DD = +1.8V to +5.5V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25 C.)
Note 1: Linearity is tested within codes 96 to 4080.
Note 2: Offset is tested at code 96.
Note 3: Gain is tested at code 4095. For the MAX5534/MAX5535, FB_ is connected to its respective OUT_.
Note 4: Guaranteed by design. Not production tested.
Note 5: V
Note 6: Outputs can be shorted to V
Note 7: Optimal noise performance is at 2nF load capacitance.
Note 8: Thermal hysteresis is defined as the change in the initial +25°C output voltage after cycling the device from T
Note 9: All digital inputs at V
Note 10: Load = 10k in parallel with 100pF, V
6
TIMING CHARACTERISTICS (V
Serial Clock Frequency
DIN to SCLK Rise Setup Time
DIN to SCLK Rise Hold Time
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Pulse-Width High
SCLK Rise to CS Rise Hold Time
CS Fall to SCLK Rise Setup Time
SCLK Rise to CS Fall Setup
CS Rise to SCK Rise Hold Time
_______________________________________________________________________________________
DD
PARAMETER
must be a minimum of 1.8V.
DD
or GND.
DD
= 1.8V to 5.5V )
DD
or GND indefinitely, provided that package power dissipation is not exceeded.
SYMBOL
f
t
t
t
t
SCLK
t
CSW
CSO
t
t
t
CSH
CSS
t
CS1
DS
DH
CH
CL
DD
= 5V, V REF = 4.096V (MAX5532/MAX5534) or V
CONDITIONS
MIN
150
24
40
40
30
30
0
0
0
0
REF
= 3.9V (MAX5533/MAX5535).
TYP
MAX
10
MAX
to T
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN
.