AD5259BRMZ100 Analog Devices Inc, AD5259BRMZ100 Datasheet - Page 17

IC DGTL POT 100K 256POS 10-MSOP

AD5259BRMZ100

Manufacturer Part Number
AD5259BRMZ100
Description
IC DGTL POT 100K 256POS 10-MSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5259BRMZ100

Taps
256
Resistance (ohms)
100K
Number Of Circuits
1
Temperature Coefficient
500 ppm/°C Typical
Memory Type
Non-Volatile
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 3.3 V, 4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Resistance In Ohms
100K
End To End Resistance
100kohm
Track Taper
Linear
Resistance Tolerance
± 30%
No. Of Steps
256
Supply Voltage Range
2.7V To 5.5V
Control Interface
I2C, Serial
No. Of Pots
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD5259EVAL - BOARD EVAL FOR AD5259 DGTL POT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5259BRMZ100
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD5259BRMZ100-R7
Quantity:
1 176
Part Number:
AD5259BRMZ100-R7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
READ MODES
Read modes are referred to as traditional because the first two bytes for all three cases are dummy bytes, which function to place the
pointer towards the correct register; this is the reason for the repeat start. Theoretically, this step can be avoided if the user reads a register
previously written to. For example, if the EEPROM was just written to, the user can then skip the two dummy bytes and proceed directly
to the slave address byte, followed by the EEPROM readback data.
Table 11. Traditional Readback of RDAC Register Value
S
Table 12. Traditional Readback of Stored EEPROM Value
STORE/RESTORE MODES
Table 13. Storing RDAC Value to EEPROM
S
Table 14. Restoring EEPROM to RDAC
S
1
S
User should issue an NOP command immediately after this command to conserve power.
7-Bit Device Address
(See Table 5)
Slave Address Byte
7-Bit Device Address
(See Table 5)
Slave Address Byte
7-Bit Device Address
(See Table 5)
Slave Address Byte
7-Bit Device Address
(See Table 5)
Slave Address Byte
0 SA 0 0 0 0 0 0 0 0 SA S
0 SA 0 0 1 0 0 0 0 0 SA S
Instruction Byte
Instruction Byte
0
0
1
SA
SA
1
Instruction Byte
1
Instruction Byte
Repeat start
Repeat start
Rev. B | Page 17 of 24
1
0
7-Bit Device Address
(See Table 5)
Slave Address Byte
7-Bit Device Address
(See Table 5)
Slave Address Byte
0
1
0
0
0
0
1 SA D7 D6 D5 D4 D3 D2 D1 D0 NA P
1 SA D7 D6 D5 D4 D3 D2 D1 D0 NA P
0
0
Read Back Data
Read Back Data
0
0
0
0
SA
SA
AD5259
P
P

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