AD7870JPZ Analog Devices Inc, AD7870JPZ Datasheet - Page 9

IC ADC 12BIT LC2MOS 28-PLCC

AD7870JPZ

Manufacturer Part Number
AD7870JPZ
Description
IC ADC 12BIT LC2MOS 28-PLCC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7870JPZ

Data Interface
Serial, Parallel
Number Of Bits
12
Sampling Rate (per Second)
100k
Number Of Converters
1
Power Dissipation (max)
95mW
Voltage Supply Source
Dual ±
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-LCC (J-Lead)
Resolution (bits)
12bit
Sampling Rate
100kSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
± 4.75V To ± 5.25V
Supply Current
8mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7870JPZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD7870JPZ-REEL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
DIP and SOIC
Pin No.
18
19
20
21
22
23
24
Table 6. Output Data for Byte Interfacing
HBEN
High
Low
PLCC
Pin No.
21
23
24
25
26
27
28
DB7/Low
Low
DB7
Mnemonic
AGND
REF OUT
V
V
12/8/CLK
CONVST
CS
IN
SS
DB6/Low
Low
DB6
Function
Analog Ground. Ground reference for track-and-hold, reference and DAC.
Voltage Reference Output. The internal 3 V reference is provided at this pin. The external load capability is
500 μA.
Analog Input. The analog input range is ±3 V for the AD7870, ±10 V for the AD7876, and 0 V to +5 V for the
AD7875.
Negative Supply, −5 V ± 5%.
Three Function Input. Defines the data format and serial clock format. With this pin at +5 V, the output
data for-mat is 12-bit parallel only. With this pin at 0 V, either byte or serial data is available and SCLK is
not continuous. With this pin at −5 V, either byte or serial data is again available but SCLK is now
continuous.
Convert Start. A low to high transition on this input puts the track-and-hold into its hold mode and
starts conversion. This input is asynchronous to the CLK input.
Chip Select. Active low logic input. The device is selected when this input is active. With CONVST tied
low, a new conversion is initiated when CS goes low.
DB5/Low
Low
DB5
Rev. C | Page 9 of 28
DB4/Low
Low
DB4
DB3/DB11
DB11(MSB)
DB3
DB2/DB10
DB10
DB2
AD7870/AD7875/AD7876
DB1/DB9
DB9
DB1
DB0/DB8
DB8
DB0 (LSB)

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