AD7714YR Analog Devices Inc, AD7714YR Datasheet - Page 4

• Manufacturer Part Number: AD7714YR
• Description: IC ADC 24BIT SIGMA-DELTA 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7714YR

• Rohs Status: RoHS non-compliant
• Number Of Bits: 24
• Sampling Rate (per Second): 1k
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 7mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• For Use With: EVAL-AD7714-3EBZ - BOARD EVALUATION FOR AD7714

AD7714–SPECIFICATIONS
(AD7714-5); REF IN(–) = AGND; MCLK IN = 1 MHz to 2.4576 MHz unless otherwise noted. All specifications T
Parameter
TRANSDUCER BURNOUT
SYSTEM CALIBRATION
POWER REQUIREMENTS
NOTES
15
16
17
18
19
20
21
Specifications subject to change without notice.
After calibration, if the input voltage exceeds positive full scale, the converter will output all 1s. If the input is less than negative full scale, then the device outputs all 0s.
These calibration and span limits apply provided the absolute voltage on the analog inputs does not exceed AV
For higher gains ( 8) at f
When using a crystal or ceramic resonator across the MCLK pins as the clock source for the device, the DV
Measured at dc and applies in the selected passband. PSRR at 50 Hz will exceed 120 dB with filter notches of 5 Hz, 10 Hz, 25 Hz or 50 Hz. PSRR at 60 Hz will exceed 120 dB
PSRR depends on gain. For Gain of 1 : 70 dB typ: For Gain of 2 : 75 dB typ; For Gain of 4 : 80 dB typ; For Gains of 8 to 128 : 85 dB typ.
If the external master clock continues to run in standby mode, the standby current increases to 150 A typical with 5 V supplies and 75 A typical with 3.3 V supplies. When
offset calibration limit applies to both the unipolar zero point and the bipolar zero point.
or resonator type (see Clocking and Oscillator Circuit section).
with filter notches of 6 Hz, 10 Hz, 30 Hz or 60 Hz.
using a crystal or ceramic resonator across the MCLK pins as the clock source for the device, the internal oscillator continues to run in standby mode and the power dissipation
depends on the crystal or resonator type (see Standby Mode section).
Current
Initial Tolerance
Drift
Positive Full-Scale Calibration Limit
Negative Full-Scale Calibration Limit
Offset Calibration Limit
Input Span
Power Supply Voltages
Power Supply Currents
Power Supply Rejection
Normal-Mode Power Dissipation
Normal-Mode Power Dissipation
Standby (Power-Down) Current
Standby (Power-Down) Current
AV
AV
DV
AV
DV
DD
DD
DD
DD
DD
Voltage (AD7714-3)
Voltage (AD7714-5)
Current
Current
Voltage
16
18
CLK IN
19
16
= 2.4576 MHz, the BST bit of the Filter High Register must be set to 1. For other conditions, it can be set to 0.
14
21
21
18
15
15
A Versions
1
0.1
(1.05
–(1.05
–(1.05
0.8
(2.1
+3 to +3.6
+4.75 to +5.25
+3 to +5.25
0.27
0.6
0.5
1.1
0.23
0.4
0.5
0.8
See Note 20
1.65
2.75
2.55
3.65
3.35
5
5.35
7
40
10
10
V
V
REF
V
REF
V
V
REF
/GAIN
REF
REF
)/GAIN
)/GAIN
)/GAIN
)/GAIN
(AV
DD
= + 3.3 V to +5 V, DV
Units
% typ
%/ C typ
V max
V max
V max
V min
V max
V
V
V
mA max
mA max
mA max
mA max
mA max
mA max
mA max
mA max
dB typ
mW max
mW max
mW max
mW max
mW max
mW max
mW max
mW max
A nom
A max
A max
–4–
Conditions/Comments
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
For Specified Performance
For Specified Performance
For Specified Performance
AV
Typically 0.2 mA. BUFFER = 0 V. f
Typically 0.4 mA. BUFFER = DV
AV
Typically 0.3 mA. BUFFER = 0 V. f
Typically 0.8 mA. BUFFER = DV
Digital I/Ps = 0 V or DV
Typically 0.15 mA. DV
Typically 0.3 mA. DV
Typically 0.4 mA. DV
Typically 0.6 mA. DV
AV
Typically 1.25 mW. BUFFER = 0 V. f
Typically 1.8 mW. BUFFER = +3.3 V. f
Typically 2 mW. BUFFER = 0 V. f
Typically 2.6 mW. BUFFER = +3.3 V. f
AV
Typically 2.5 mW. BUFFER = 0 V. f
Typically 3.5 mW. BUFFER = +5 V. f
Typically 4 mW. BUFFER = 0 V. f
Typically 5 mW. BUFFER = +5 V. f
External MCLK IN = 0 V or DV
External MCLK IN = 0 V or DV
DD
DD
DD
DD
= DV
= DV
= 3.3 V or 5 V. BST Bit of Filter High Register = 0
= 3.3 V or 5 V. BST Bit of Filter High Register = 1
DD
= +3.3 V to +5 V, REF IN(+) = +1.25 V (AD7714-3) or +2.5 V
DD
DD
DD
= +3.3 V. Digital I/Ps = 0 V or DV
= +5 V. Digital I/Ps = 0 V or DV
DD
current and power dissipation will vary depending on the crystal
+ 30 mV or go more negative than AGND – 30 mV. The
DD
DD
DD
DD
DD.
= 5 V. f
= 3.3 V. f
= 5 V. f
= 3.3 V. f
External MCLK IN
MIN
to T
CLK IN
CLK IN
DD
DD
DD
DD
CLK IN
CLK IN
CLK IN
. Typically 20 A. V
. Typically 5 A. V
CLK IN
CLK IN
CLK IN
MAX
CLK IN
. f
. f
CLK IN
CLK IN
CLK IN
CLK IN
CLK IN
CLK IN
= 1 MHz
= 2.4576 MHz
unless otherwise noted.)
CLK IN
= 2.4576 MHz
= 2.4576 MHz. BST Bit = 0
= 2.4576 MHz. BST Bit = 0
= 1 MHz
= 1 MHz or 2.4576 MHz
= 2.4576 MHz
= 2.4576 MHz. BST Bit = 0
= 1 MHz. BST Bit = 0
= 1 MHz. BST Bit = 0
= 2.4576 MHz. BST Bit = 0
= 1 MHz. BST Bit = 0
= 1 MHz or 2.4576 MHz
= 2.4576 MHz
= 1 MHz. BST Bit = 0
DD
DD
. External MCLK IN
. External MCLK IN
DD
DD
17
17
= +3.3 V
= +5 V
REV. C