LTC1401CS8 Linear Technology, LTC1401CS8 Datasheet - Page 11

IC A/D CONV 12BIT W/SHTDN 8-SOIC

LTC1401CS8

Manufacturer Part Number
LTC1401CS8
Description
IC A/D CONV 12BIT W/SHTDN 8-SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1401CS8

Number Of Bits
12
Sampling Rate (per Second)
200k
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
30mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1401, a printed circuit board is
required. Layout for the printed circuit board should
ensure that digital and analog signal lines are separated as
much as possible. In particular, care should be taken not
to run any digital traces alongside an analog signal trace
or underneath the ADC. The analog input should be
screened by GND.
High quality tantalum and ceramic bypass capacitors
should be used at the V
Typical Application on the first page of this datasheet. For
APPLICATIONS
0V TO 2.048V
ANALOG
Figure 9b. LTC1401 Offset and Full-Scale Adjust Circuit
V
INPUT
IN
ADDITIONAL PINS OMITTED FOR CLARITY
±20LSB TRIM RANGE
3V
Figure 9a. LTC1401 Full-Scale Adjust Circuit
50Ω
R1
10k
10k
R1
R2
10k
R2
10k
R9
20Ω
U
CC
R3
10k
INFORMATION
+
+
U
and V
A1
A1
100Ω
REF
FULL-SCALE
R4
ADJUST
W
pins as shown in the
R4
100k
R5
4.3k
FULL-SCALE
ADJUST
R3
100k
R6
400Ω
100k
A
GND
LTC1401
R7
IN
U
LTC1401 • F09a
A
LTC1401
IN
3V
LTC1401 • F09b
R8
10k
OFFSET
ADJUST
optimum performance, a 10µF surface mount AVX capaci-
tor in parallel with a 0.1µF ceramic is recommended for the
V
to the pins as possible. The traces connecting the pins and
the bypass capacitors must be kept short and should be
made as wide as possible.
Input signal leads to A
(Pin 4) should be kept as short as possible to minimize
noise coupling. In applications where this is not possible,
a shielded cable between the analog input signal and the
ADC is recommended. Also, any potential difference in
grounds between the analog signal and the ADC appears
as an error voltage in series with the analog input signal.
Attention should be paid to reducing the ground circuit
impedance as much as possible.
Figure 10 shows the recommended system ground con-
nections. All analog circuitry grounds should be termi-
nated at the LTC1401 GND pin. The ground return to the
power supply from Pin 4 should be low impedance for
noise free operation. Digital circuitry grounds must be
connected to the digital supply common.
Power-Down Mode
Upon power up, the LTC1401 is initialized to the active
state and is ready for conversion. However, the chip can be
easily placed into Nap or Sleep mode by exercising the
right combination of CLK and CONV signals. In Nap mode,
all power is off except the internal reference which remains
active and provides 1.20V output voltage to the other
CC
and V
GND
GND
REF
ANALOG SUPPLY
Figure 10. Power Supply Connection
pins. The capacitors must be located as close
LTC1401
+
IN
3V
V
and signal return leads from GND
CC
GND
GND
DIGITAL CIRCUITRY
DIGITAL SUPPLY
LTC1401
+
LTC1401 • F10
V
3V
CC
11
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