MAX11105AUT+T Maxim Integrated Products, MAX11105AUT+T Datasheet - Page 10

• Manufacturer Part Number: MAX11105AUT+T
• Description: IC ADC 12BIT SPI/SRL 1CH SOT23-6
• Manufacturer: Maxim Integrated Products

Specifications of MAX11105AUT+T

• Number Of Bits: 12
• Sampling Rate (per Second): 2M
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 696mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-6
• Conversion Rate: 2 MSPs
• Resolution: 12 bit
• Interface Type: Serial (3-Wire, SPI, QSPI, Microwire)
• Snr: 73 dB
• Voltage Reference: 1 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.2 V
• Maximum Power Dissipation: 696 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Input Voltage: 2.2 V to 3.6 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MAX11105AUT+TTR

2Msps/3Msps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11110/MAX11117) (continued)
(V
C
10
DIGITAL OUTPUT (DOUT)
Output-High Voltage
Output-Low Voltage
High-Impedance Leakage
Current
High-Impedance Output
Capacitance
POWER SUPPLY
Positive Supply Voltage
Positive Supply Current
(Full-Power Mode)
Positive Supply Current
(Full-Power Mode), No Clock
Power-Down Current
Line Rejection
TIMING CHARACTERISTICS (Note 1)
Quiet Time
CS Pulse Width
CS Fall to SCLK Setup
CS Falling Until DOUT High-
Impedance Disabled
Data Access Time After SCLK
Falling Edge
SCLK Pulse Width Low
SCLK Pulse Width High
Data Hold Time From SCLK
Falling Edge
SCLK Falling Until DOUT High-
Impedance
Power-Up Time
DOUT
DD
_____________________________________________________________________________________
= 2.2V to 3.6V. MAX11110: f
= 10pF, T
PARAMETER
A
= -40NC to +125NC, unless otherwise noted. Typical values are at T
SCLK
SYMBOL
C
I
I
V
V
V
I
VDD
VDD
I
OUT
OL
PD
t
t
t
t
t
t
t
t
t
= 32MHz, 50% duty cycle, 2Msps. MAX11117: f
OH
DD
OL
Q
1
2
3
4
5
6
7
8
I
I
MAX11117, V
MAX11110, V
MAX11117
MAX11110
Leakage only
V
(Note 2)
Figure 2,
Percentage of clock period
Percentage of clock period
Figure 3
Figure 4 (Note 2)
Conversion cycle
SOURCE
SINK
DD
= +2.2V to +3.6V
= 200µA
= 200µA
V
DD
AIN
AIN
= +2.2V to +3.6V
CONDITIONS
= V
= V
GND
GND
A
= +25NC.)
SCLK
0.85 x
= 48MHz, 50% duty cycle, 3Msps.
MIN
V
2.2
2.5
10
40
40
DD
4
5
1
5
TYP
1.98
1.48
0.17
1.3
4
0.15 x
MAX
Q1.0
V
3.55
3.6
2.6
10
15
60
60
14
DD
1
UNITS
LSB/V
Cycle
mA
mA
FA
pF
FA
ns
ns
ns
ns
ns
ns
ns
%
%
V
V
V