AD7904BRUZ Analog Devices Inc, AD7904BRUZ Datasheet - Page 2

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AD7904BRUZ

Manufacturer Part Number
AD7904BRUZ
Description
IC ADC 8BIT 4CH 1MSPS 16-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7904BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
8
Sampling Rate (per Second)
1M
Number Of Converters
1
Power Dissipation (max)
13.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
8bit
Sampling Rate
1MSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Current
2.7mA
Digital Ic Case Style
TSSOP
Package
16TSSOP
Resolution
8 Bit
Architecture
SAR
Number Of Adcs
1
Number Of Analog Inputs
4
Digital Interface Type
Serial (SPI, QSPI, Microwire)
Input Type
Voltage
Signal To Noise Ratio
49(Min) dB
Polarity Of Input Voltage
Unipolar
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD79X4CBZ - BOARD EVALUATION FOR AD79X4CBZ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD7904–SPECIFICATIONS
Parameter
DYNAMIC PERFORMANCE
DC ACCURACY
ANALOG INPUT
REFERENCE INPUT
LOGIC INPUTS
LOGIC OUTPUTS
CONVERSION RATE
Signal-to-Noise + Distortion (SINAD)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Aperture Delay
Aperture Jitter
Channel-to-Channel Isolation
Full Power Bandwidth
Resolution
Integral Nonlinearity
Differential Nonlinearity
0 V to REF
0 V to 2 × REF
Input Voltage Range
DC Leakage Current
Input Capacitance
REF
DC Leakage Current
REF
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
Output High Voltage, V
Output Low Voltage, V
Floating-State Leakage Current
Floating-State Output Capacitance
Output Coding
Conversion Time
Track/Hold Acquisition Time
Throughput Rate
(SFDR)
Second Order Terms
Third Order Terms
Offset Error
Offset Error Match
Gain Error
Gain Error Match
Positive Gain Error
Positive Gain Error Match
Zero Code Error
Zero Code Error Match
Negative Gain Error
Negative Gain Error Match
IN
IN
Input Voltage
Input Impedance
2
IN
Input Range
IN
2
IN
Input Range
IN
INL
INH
3
OL
OH
2
2
2
2
3
2
B Version
49
49
–66
–64
–90
–90
10
50
–85
8.2
1.6
8
± 0.2
± 0.2
± 0.5
± 0.05
± 0.2
± 0.05
± 0.2
± 0.05
± 0.5
± 0.1
± 0.2
± 0.05
0 to REF
0 to 2 × REF
± 1
20
2.5
± 1
36
0.7 × V
0.3 × V
± 1
10
V
0.4
± 1
10
Straight (Natural) Binary
Twos Complement
800
300
300
1
DRIVE
(AV
unless otherwise noted.)
– 0.2
DD
DRIVE
DRIVE
IN
= V
1
DRIVE
IN
–2–
= 2.7 V to 5.25 V, REF
Unit
dB min
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
dB typ
MHz typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
V
V
µA max
pF typ
V
µA max
kΩ typ
V min
V max
µA max
pF max
V min
V max
µA max
pF max
ns max
ns max
ns max
MSPS max See Serial Interface Section
Test Conditions/Comments
f
fa = 40.1 kHz, fb = 41.5 kHz
f
Guaranteed No Missed Codes to 8 Bits
Straight Binary Output Coding
–REF
Twos Complement Output Coding
RANGE Bit Set to 1
RANGE Bit Set to 0, V
± 1% Specified Performance
f
Typically 10 nA, V
I
I
Coding Bit Set to 1
Coding Bit Set to 0
16 SCLK Cycles with SCLK at 20 MHz
Sine Wave Input
Full-Scale Step Input
IN
IN
@ 3 dB
@ 0.1 dB
SAMPLE
SOURCE
SINK
= 50 kHz Sine Wave, f
= 400 kHz
IN
= 200 µA
IN
= 2.5 V, f
= 1 MSPS
to +REF
= 200 µA, V
SCLK
IN
IN
= 20 MHz, T
Biased about REF
DD
= 0 V or V
DD
= 2.7 V to 5.25 V
/V
SCLK
DRIVE
A
= 20 MHz
= T
DRIVE
= 4.75 V to 5.25 V
MIN
to T
IN
with
MAX
,
REV. 0

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