AD73322LAST Analog Devices Inc, AD73322LAST Datasheet - Page 2

IC ANALOG FRONT END DUAL 44-LQFP

AD73322LAST

Manufacturer Part Number
AD73322LAST
Description
IC ANALOG FRONT END DUAL 44-LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD73322LAST

Rohs Status
RoHS non-compliant
Number Of Bits
16
Number Of Channels
4
Power (watts)
73mW
Voltage - Supply, Analog
2.7 V ~ 5.5 V
Voltage - Supply, Digital
2.7 V ~ 5.5 V
Package / Case
44-LQFP

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AD73322L
TABLE OF CONTENTS
Specifications..................................................................................... 4
Absolute Maximum Ratings............................................................ 9
Pin Configurations and Function Descriptions ......................... 10
Terminology .................................................................................... 12
Typical Performance Characteristics and Functional Block
Diagram ........................................................................................... 13
Functional Descriptions ................................................................ 14
Current Summary......................................................................... 6
Signal Ranges ................................................................................ 7
Timing Characteristics ................................................................ 7
Timing Diagrams.......................................................................... 8
ESD Caution.................................................................................. 9
Abbreviations .............................................................................. 12
Encoder Channels ...................................................................... 14
Programmable Gain Amplifier................................................. 14
ADC ............................................................................................. 14
Analog Sigma-Delta Modulator ............................................... 14
Decimation Filter........................................................................ 15
ADC Coding ............................................................................... 15
Decoder Channel........................................................................ 16
DAC Coding................................................................................ 16
Interpolation Filter ..................................................................... 16
Analog Smoothing Filter and PGA.......................................... 16
Differential Output Amplifiers................................................. 16
Voltage Reference ....................................................................... 16
Analog and Digital Gain Taps................................................... 17
Digital Gain Tap.......................................................................... 18
Serial Port (SPORT) ................................................................... 18
SPORT Overview........................................................................ 18
SPORT Register Maps................................................................ 19
Master Clock Divider................................................................. 19
Serial Clock Rate Divider .......................................................... 19
Rev. A | Page 2 of 48
Operation......................................................................................... 24
Interfacing ....................................................................................... 27
Performance .................................................................................... 29
Design Considerations................................................................... 32
Sample Rate Divider................................................................... 19
DAC Advance Register .............................................................. 20
Control Register A ..................................................................... 21
Control Register B...................................................................... 21
Control Register C...................................................................... 21
Control Register D ..................................................................... 22
Control Register E ...................................................................... 22
Control Register F ...................................................................... 22
Control Register G ..................................................................... 23
Control Register H ..................................................................... 23
Resetting the AD73322L ........................................................... 24
Power Management ................................................................... 24
Operating Modes........................................................................ 24
Program (Control) Mode .......................................................... 24
Data Mode................................................................................... 25
Mixed Program/Data Mode...................................................... 25
Digital Loop-Back Mode........................................................... 25
SPORT Loop-Back Mode.......................................................... 25
Analog Loop-Back Mode .......................................................... 26
Cascade Operation..................................................................... 27
Encoder Section.......................................................................... 29
Encoder Group Delay ................................................................ 30
Decoder Section ......................................................................... 30
On-Chip Filtering....................................................................... 31
Decoder Group Delay................................................................ 31
Analog Inputs ............................................................................. 32
Interfacing to an Electret Microphone .................................... 34

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