MAXQ3183-RAN+ Maxim Integrated Products, MAXQ3183-RAN+ Datasheet - Page 69

• Manufacturer Part Number: MAXQ3183-RAN+
• Description: IC AFE POLYPHASE MULTI 28TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAXQ3183-RAN+

• Number Of Channels: 8
• Power (watts): 140mW
• Voltage - Supply, Analog: 3.6V
• Voltage - Supply, Digital: 3.6V
• Package / Case: 28-TSSOP
• For Use With: MAXQ3183-KIT - KIT EV REFRNC DSIGN FOR MAXQ3183
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Bits: -
• Other names: 90-M3183+RAN

• R_ADCACQ: Modify this register to change the
Line frequency measurement is based on zero-crossing
detection. For that purpose each voltage signal is
passed through a digital lowpass filter, controlled by
the ZC_LPF register. This register specifies the b
ficient of a first-order LPF using following formula:
The MSB of this register must be zero.
For each phase A, B, and C, the MAXQ3183 counts the
number of scan frames (NS) between zero crossings
within a DSP cycle. Each individual phase A, B, or C
zero-crossing event contributes the raw NS count that
plugs as input to lowpass filter:
The filter coefficient is a signed 16-bit value and can be
configured by master. Here Y denotes the global NS
value, X denotes individual NS measurements pro-
duced by zero-crossing events detected on the phase
A, B, or C voltage channel. Note that if all three phase
voltages present, the filter above receives three inputs
each DSP cycle. The global NS value is used to gener-
ate the trigger for DSP processing. Note that the NS
value can be configured by the master, which could be
necessary if all three voltage signals are lost and no
zero-crossings are detected. The line period is then
calculated as a product of NS and the scan frame t
The reciprocal of this value is the line frequency, which
can be obtained as a fixed-point value with 1 LSB =
0.001Hz by reading the LINEFR register.
The MAXQ3183 keeps another set of real and virtual
registers to track power and energy at the fundamental
line frequency. These “fundamental mode” registers
behave identically to the standard power and energy
registers, but are prefiltered to exclude harmonic
power.
acquisition time. The acquisition time is the time from
ADC power-on until conversion starts, and is provid-
ed to allow the input amplifiers to settle. By default
this is set to 47 decimal, or 6μs at an 8MHz system
clock. If the system clock rate is changed, then
R_ADCACQ should change so that this value
remains about 6μs.
Y
Fine-Tuning the Line Frequency Measurement
n
= Y
n - 1
Low-Power, Multifunction, Polyphase AFE
+ (AVG_NS/65,536) x (X
Fine-Tuning the DSP Controls
______________________________________________________________________________________
b
0
=
Fundamental Mode Registers
ZC LPF
2
_
with Harmonics and Tamper Detect
16
n
- Y
n - 1
0
)
coef-
FR
.
The fundamental mode filter is specified in the B0FUND
and A1FUND registers. B0FUND is the feed-forward
coefficient and specifies the bandwidth of the funda-
mental mode filter; A1FUND is the feedback coefficient
and specifies the center frequency of the fundamental
mode filter.
In most cases, you can leave these filters at their
default values. If you wish to change the filter parame-
ters, first choose the desired bandwidth:
In this equation, bw is the desired bandwidth in hertz
and t
B0FUND to b
imal 145 (0x91) giving a bandwidth of about 2Hz.
To set the center frequency, calculate a
the following formula:
In this equation, b
forward coefficient, f
in hertz, and t
to a
(0x3B6) giving a center frequency of approximately
50Hz.
The fundamental mode filter is, by default, quite sharp
with 3dB points only 1Hz off of the center frequency.
This means that if the frequency drifts even only slight-
ly, the fundamental mode power measurement is likely
to have significant inaccuracy.
The MAXQ3183 provides a mechanism to track the fre-
quency by updating the A1FUND register on each DSP
cycle. This mechanism is automatically enabled by
default.
You may wish to disable the automatic tracking facility
under some circumstances, particularly if you have
defined a broader bandwidth than default and are com-
fortable that the frequency will not drift beyond the
passband. To disable the filter, set the DFUNA bit in the
OPMODE2 register.
You may also elect to disable fundamental mode oper-
ation completely. To do this, set the DFUN bit in the
OPMODE2 register.
In addition to the ability to measure power and energy
at the fundamental frequency, the MAXQ3183 provides
a mechanism to isolate a particular harmonic on any
voltage or current channel and measure the amplitude
of that harmonic.
1
x 2
FR
16
a
is the frame period, typically 360μs. Set
1
. By default, A1FUND contains decimal 950
= 2 - 2(1 - b
0
FR
x 2
is the ADC frame period. Set A1FUND
16
0
b
. By default, B0FUND contains dec-
0
PK
is the previously calculated feed-
= π x bw x t
0
is the desired center frequency
Harmonic Measurement
) x cos(2π x f
FR
PK
1
x t
according to
FR
)
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