M41ST84WMQ6E STMicroelectronics, M41ST84WMQ6E Datasheet - Page 22

• Manufacturer Part Number: M41ST84WMQ6E
• Description: IC RTC 3.0V 512BIT NVRAM 16SOIC
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/Supervisorr

Specifications of M41ST84WMQ6E

• Memory Size: 64B
• Time Format: HH:MM:SS:hh (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2802-5; M41ST84WMQ6

Clock operation
3.5
Note:
Note:
22/36
Figure 15. Backup mode alarm waveform
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the watchdog
Register, address 09h. Bits BMB4-BMB0 store a binary multiplier and the two lower order
bits RB1-RB0 select the resolution, where 00 = 1/16 second, 01 = 1/4 second, 10 = 1
second, and 11 = 4 seconds. The amount of time-out is then determined to be the
multiplication of the five-bit multiplier value with the resolution. (For example: writing
00001110 in the watchdog register = 3*1, or 3 seconds).
Accuracy of timer is within ± the selected resolution.
If the processor does not reset the timer within the specified period, the M41ST84W sets the
WDF (watchdog flag) and generates a watchdog interrupt or a microprocessor reset.
The most significant bit of the watchdog register is the watchdog steering bit (WDS). When
set to a '0,' the watchdog will activate the IRQ/FT/OUT pin when timed-out. When WDS is
set to a '1,' the watchdog will output a negative pulse on the RST pin for t
register, FT, AFE, ABE and SQWE bits will reset to a '0' at the end of a watchdog time-out
when the WDS bit is set to a '1.'
The watchdog timer can be reset by two methods: 1) a transition (high-to-low or low-to-high)
can be applied to the watchdog input pin (WDI) or 2) the microprocessor can perform a
WRITE of the watchdog register. The time-out period then starts over.
The WDI pin should be tied to V
In order to perform a software reset of the watchdog timer, the original time-out period can
be written into the watchdog register, effectively restarting the count-down cycle.
Should the watchdog timer time-out, and the WDS bit is programmed to output an interrupt,
a value of 00h needs to be written to the watchdog register in order to clear the IRQ/FT/OUT
V CC
V PFD
V SO
ABE, AFE Bits in Interrupt Register
AF bit in Flags Register
IRQ/FT/OUT
HIGH-Z
Doc ID 7530 Rev 9
SS
if not used.
rec
tREC
. The watchdog
HIGH-Z
M41ST84W
AI03920