DS1670E Maxim Integrated Products, DS1670E Datasheet - Page 6

• Manufacturer Part Number: DS1670E
• Description: IC CTRLR SYSTEM PORTABLE 20TSSOP
• Manufacturer: Maxim Integrated Products
• Type: Portable System Controllerr

Specifications of DS1670E

• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: 3-Wire Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -

AIS0-AIS1 (Analog Input Select). These 2 bits are used to determine the analog input for the analog-to-
digital conversion. Table 2 lists the specific analog input that is selected by these two bits.
AIE (Alarm Interrupt Enable). When set to a logic 1, this bit permits the Interrupt Request Flag (IRQF)
bit in the status register to assert INT. When the AIE bit is set to logic 0, the IRQF bit does not initiate the
INT signal.
ANALOG INPUT SELECTION Table 2
STATUS REGISTER
CU (Conversion Update In Progress). When this bit is a 1, an update to the ADC Register (register
0Eh) will occur within 488ms. When this bit is a 0, an update to the ADC Register will not occur for at
least 244ms.
LOBAT (Low Battery Flag). This bit reflects the status of the backup power source connected to the
V BAT pin. When V
LOBAT is set to a logic 1.
IRQF (Interrupt Request Flag). A logic 1 in the Interrupt Request Flag bit indicates that the current
time has matched the time of day Alarm registers. If the AIE bit is also a logic 1, the INT pin will go
high. IRQF is cleared by reading or writing to any of the alarm registers.
POWER-UP DEFAULT STATES
These bits are set to a one upon initial power-up: EOSC , TD1 and TD0. These bits are cleared upon
initial power-up: WP, AIS1, and AIS0.
NONVOLATILE SRAM CONTROLLER
The DS1670 provides automatic backup and write protection for external SRAM. This function is
provided by gating the chip enable signals and by providing a constant power supply through the V
pin. The DS1670 was specifically designed with the Intel 80186 and 386EX microprocessors in mind. As
such, the DS1670 can provide access to the external SRAM in either byte-wide or word-wide format.
This capability is provided by the chip enable scheme. Three input signals and two output signals are
used for enabling the external SRAM(s) (see Figure 4).
and
(chip enable low) and the
BIT 7
AIS1
CU
BLE
0
0
1
1
(byte low enable) are used for enabling either one or two external SRAMs through the
LOBAT
BIT 6
AIS0
0
1
0
1
BAT
BIT 5
0
is greater than 2.5V, LOBAT is set to a logic 0. When V
CEOH
ANALOG INPUT
BIT 4
(chip enable high) outputs. Table 3 illustrates the function of these pins.
0
NONE
AIN0
AIN1
AIN2
BIT 3
0
BIT 2
6 of 16
0
BIT 1
CEI
0
(chip enable in),
BIT 0
IRQF
BAT
BHE
is less than 2.3 volts,
(byte high enable),
DS1670
CEOL
CCO