ISL12022IBZ Intersil, ISL12022IBZ Datasheet - Page 9

• Manufacturer Part Number: ISL12022IBZ
• Description: IC RTC/CALENDAR TEMP SNSR 8-SOIC
• Manufacturer: Intersil
• Type: Clock/Calendarr

Specifications of ISL12022IBZ

• Memory Size: 1K (128 x 8)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

• Interrupt Mode. The pin provides an interrupt signal
• Frequency Output Mode. The pin outputs a clock signal,
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of
the device. The input buffer on this pin is always active (not
gated). It is disabled when the backup power supply on the
V
Serial Data (SDA)
SDA is a bi-directional pin used to transfer data into and out
of the device. It has an open drain output and may be ORed
with other open drain or open collector outputs. The input
buffer is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor.
The output circuitry controls the fall time of the output signal
with the use of a slope controlled pull-down. The circuit is
designed for 400kHz I
when the backup power supply on the V
V
Chip power supply and ground pins. The device will operate
with a power supply from V
capacitor is recommended on the V
Functional Description
Power Control Operation
The power control circuit accepts a V
Many types of batteries can be used with Intersil RTC
products. For example, 3.0V or 3.6V Lithium batteries are
appropriate, and battery sizes are available that can power
the ISL12022 for up to 10 years. Another option is to use a
super capacitor for applications where V
up to a month. See the “Application Section” on page 25 for
more information.
Normal Mode (V
(V
To transition from the V
following conditions must be met:
Condition 1:
V
where V
Condition 2:
V
where V
BAT
DD
DD
DD
output. This signal notifies a host processor that an alarm
has occurred and requests action. It is an active low
output.
which is related to the crystal frequency. The frequency is
user selectable and enabled via the I
BAT
, GND
< V
< V
pin is activated to minimize power consumption.
)
BATHYS
TRIP
BAT
TRIP
- V
≈ 2.2V
BATHYS
≈ 50mV
DD
2
) to Battery-Backup Mode
C interface speeds. It is disabled
DD
to V
DD
9
= 2.7V to 5.5VDC. A 0.1µF
BAT
mode, both of the
DD
DD
2
pin to ground.
BAT
DD
C bus.
and a V
is interrupted for
pin is activated.
BAT
input.
ISL12022
Battery-Backup Mode (V
(V
The ISL12022 device will switch from the V
when one of the following conditions occurs:
Condition 1:
V
where V
Condition 2:
V
where V
These power control situations are illustrated in Figures 11
and 12.
The I
power consumption. Aside from this, all RTC functions are
operational during battery-backup mode. Except for SCL and
SDA, all the inputs and outputs of the ISL12022 are active
during battery-backup mode unless disabled via the control
register.
The device Time Stamps the switchover from V
and V
registers respectively. If multiple V
occur before status is read, the earliest V
power-down time is stored and the most recent V
time is stored.
Temperature conversion and compensation can be enabled
in battery-backup mode. Bit BTSE in the BETA register
controls this operation, as described in “BETA Register
(BETA)” on page 17.
DD
DD
DD
FIGURE 11. BATTERY SWITCHOVER WHEN V
FIGURE 12. BATTERY SWITCHOVER WHEN V
V
V
V
V
V
V
> V
> V
TRIP
2
TRIP
BAT
DD
BAT
)
V
BAT
DD
C bus is deactivated in battery-backup mode to reduce
BAT
BATHYS
TRIPHYS
BAT
TRIP
to V
- V
BATHYS
+ V
V
+ V
TRIP
DD
BATHYS
≈ 50mV
, and the time is stored in t
TRIPHYS
≈ 30mV
BATTERY-BACKUP
BATTERY-BACKUP
MODE
BAT
MODE
DD
) to Normal Mode
power-down sequences
DD
V
V
BAT
TRIP
SV2B
BAT
to V
DD
+ V
BAT
BAT
to V
+ V
BAT
BAT
and t
BATHYS
TRIPHYS
to V
June 23, 2009
DD
< V
> V
3.0V
2.2V
to V
2.2V
1.8V
BAT
SB2V
FN6659.2
TRIP
TRIP
mode
DD