M41T81SM6F STMicroelectronics, M41T81SM6F Datasheet - Page 13

• Manufacturer Part Number: M41T81SM6F
• Description: IC RTC SERIAL W/ALARM 8SOIC
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/Alarmr

Specifications of M41T81SM6F

• Memory Size: 20B
• Time Format: HH:MM:SS:hh (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Function: Clock/Calendar/Alarm/Timer Interrupt
• Rtc Memory Size: 20 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (I2C)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4684-2

M41T81S
WRITE mode
Data retention mode
In this mode the master transmitter transmits to the M41T81S slave receiver. Bus protocol is
shown in
(R/W=0) is placed on the bus and indicates to the addressed device that word address “An”
will follow and is to be written to the on-chip address pointer. The data word to be written to
the memory is strobed in next and the internal address pointer is incremented to the next
address location on the reception of an acknowledge clock. The M41T81S slave receiver
will send an acknowledge clock to the master transmitter after it has received the slave
address see
data byte.
With valid V
WRITE cycles. Should the supply voltage decay, the power input will be switched from the
V
this time the clock registers will be maintained by the attached battery supply. On power-up,
when V
For a further, more detailed review of lifetime calculations, please see application note
AN1012.
Figure 10. WRITE mode sequence
CC
BUS ACTIVITY:
MASTER
SDA LINE
BUS ACTIVITY:
pin to the battery when V
CC
Figure 10 on page
returns to a nominal value, write protection continues for t
CC
Figure 7 on page 12
applied, the M41T81S can be accessed as described above with READ or
S
ADDRESS
SLAVE
13. Following the START condition and slave address, a logic '0'
CC
Doc ID 10773 Rev 6
ADDRESS (An)
falls below the battery backup switchover voltage (V
and again after it has received the word address and each
WORD
DATA n
DATA n+1
REC
.
DATA n+X
Operation
SO
P
AI00591
13/32
). At