PCF8563P/F4,112 NXP Semiconductors, PCF8563P/F4,112 Datasheet - Page 15

IC REAL TIME CLK/CALENDAR 8-DIP

PCF8563P/F4,112

Manufacturer Part Number
PCF8563P/F4,112
Description
IC REAL TIME CLK/CALENDAR 8-DIP
Manufacturer
NXP Semiconductors
Type
Clock/Calendarr
Datasheet

Specifications of PCF8563P/F4,112

Package / Case
8-DIP (0.300", 7.62mm)
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Function
Clock/Calendar/Alarm/Timer/Interrupt
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Rtc Bus Interface
Serial (2-Wire, I2C)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-3615 - DEMO BOARD I2C
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1067-5
935262218112
PCF8563PN
NXP Semiconductors
PCF8563
Product data sheet
8.6.5 Alarm flag
8.7 Register CLKOUT_control and clock output
By clearing the alarm enable bit (AE_x) of one or more of the alarm registers, the
corresponding alarm condition(s) are active. When an alarm occurs, AF is set to logic 1.
The asserted AF can be used to generate an interrupt (INT). The AF is cleared using the
interface.
The registers at addresses 09h through 0Ch contain alarm information. When one or
more of these registers is loaded with minute, hour, day or weekday, and its
corresponding AE_x is logic 0, then that information is compared with the current minute,
hour, day, and weekday. When all enabled comparisons first match, the alarm flag (AF in
register Control_2) is set to logic 1.
The generation of interrupts from the alarm function is controlled via bit AIE. If bit AIE is
enabled, the INT pin follows the condition of bit AF. AF will remain set until cleared by the
interface. Once AF has been cleared, it will only be set again when the time increments to
match the alarm condition once more. Alarm registers which have their AE_x bit at logic 1
are ignored.
Frequencies of 32.768 kHz (default), 1.024 kHz, 32 Hz, and 1 Hz can be generated for
use as a system clock, microcontroller clock, input to a charge pump, or for calibration of
the oscillator.
Fig 10. Alarm function block diagram
(1) Only when all enabled alarm settings are matching.
It’s only on increment to a matched case that the alarm flag is set, see
check now signal
All information provided in this document is subject to legal disclaimers.
WEEKDAY ALARM
MINUTE ALARM
WEEKDAY TIME
HOUR ALARM
MINUTE TIME
DAY ALARM
HOUR TIME
DAY TIME
Rev. 8 — 18 November 2010
=
=
=
=
AE_W
AE_M
AE_H
AE_D
set alarm flag AF
AE_M = 1
example
013aaa088
Real-time clock/calendar
Section
1
0
(1)
PCF8563
© NXP B.V. 2010. All rights reserved.
8.6.5.
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