NE555DX Fairchild Semiconductor, NE555DX Datasheet - Page 6

IC TIMER SINGLE PREC 8-SOP

NE555DX

Manufacturer Part Number
NE555DX
Description
IC TIMER SINGLE PREC 8-SOP
Manufacturer
Fairchild Semiconductor
Type
555 Type, Timer/Oscillator (Single)r
Datasheet

Specifications of NE555DX

Voltage - Supply
4.5 V ~ 16 V
Current - Supply
7.5mA
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
Frequency
100kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
LM555/NE555/SA555
An astable timer operation is achieved by adding resistor R
operation, the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operating as a multi
vibrator. When the timer output is high, its internal discharging Tr. turns off and the V
function with the time constant (R
When the V
resetting the F/F and causing the timer output to become low. This in turn turns on the discharging Tr. and the C1 discharges
through the discharging channel formed by R
output on the trigger terminal becomes high and the timer output becomes high again. The discharging Tr. turns off and the
V
In the above process, the section where the timer output is high is the time it takes for the V
and the section where the timer output is low is the time it takes for the V
is high, the equivalent circuit for charging capacitor C1 is as follows:
Since the duration of the timer output high state(t
6 6 6 6
C1
Vcc
rises again.
V C1 t
C1
C
=
, or the threshold voltage, reaches 2Vcc/3, the comparator output on the trigger terminal becomes high,
V
1
C1
V CC 1
dv c1
------------ -
dt
R
0+
A
=
V cc V 0-
------------------------------ -
=
R A
2
-- - e
3
V
-
CC
+
------------------------------------
R
R B
R A
B
3
A
Figure 7. Waveforms of Astable Operation
Figure 7. Waveforms of Astable Operation
Figure 7. Waveforms of Astable Operation
Figure 7. Waveforms of Astable Operation
+
+R
t
R B
B
C1
C1
)*C.
2
1
B
and the discharging Tr. When the V
Vc1(0-)=Vcc/3
H
3
) is the amount of time it takes for the V
B
to Figure 1 and configuring as shown on Figure 5. In the astable
C1
to drop from 2Vcc/3 to Vcc/3. When timer output
C1
C1
falls below Vcc/3, the comparator
increases by exponential
C1
C1
(t) to reach 2Vcc/3,
to rise from Vcc/3 to 2Vcc/3,

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