MPC953FAR2 Freescale Semiconductor, MPC953FAR2 Datasheet - Page 5

• Manufacturer Part Number: MPC953FAR2
• Description: IC PLL CLOCK DRIVER 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Clock Driver, Fanout Distribution, Multiplexer , Zero Delay Bufferr

Specifications of MPC953FAR2

• Pll: Yes
• Input: LVCMOS, LVPECL, LVTTL
• Output: LVCMOS
• Number Of Circuits: 1
• Ratio - Input:output: 2:9
• Differential - Input:output: Yes/No
• Frequency - Max: 110MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 110MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: MPC953FATR

by the impedance mismatch seen looking into the driver. The
parallel combination of the 43 series resistor plus the output
impedance does not match the parallel combination of the
line impedances. The voltage wave launched down the two
lines will equal:
unity reflection coefficient, to 2.62V. It will then increment
towards the quiescent 3.0V in steps separated by one round
trip delay (in this case 4.0ns).
ECLinPS and ECLinPS Lite
DL140 — Rev 3
At the load end the voltage will double, due to the near
Zo = 50 || 50
Rs = 36 || 36
Ro = 14
3.0
2.5
2.0
1.5
1.0
0.5
0
VL = VS ( Zo / (Rs + Ro +Zo))
VL = 3.0 (25 / (18 + 14 + 25) = 3.0 (25 / 57)
= 1.31V
Figure 5. Single versus Dual Waveforms
t D = 3.8956
2
In
OutA
4
6
TIME (nS)
t D = 3.9386
OutB
8
10
12
14
5
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To
better match the impedances when driving multiple lines the
situation in Figure 6 should be used. In this case the series
terminating resistors are reduced such that when the parallel
combination is added to the output buffer impedance the line
impedance is perfectly matched.
engineers who want to simulate their specific interconnect
schemes. In addition IV characteristics are in the process of
being generated to support the other board level simulators in
general use.
Since this step is well above the threshold region it will not
SPICE level output buffer models are available for
Figure 6. Optimized Dual Line Termination
OUTPUT
MPC953
BUFFER
14
14 + 22
R S = 22
R S = 22
25 = 25
k
22 = 50
Z O = 50
Z O = 50
k
50
MOTOROLA
MPC953