SI5368C-B-GQ Silicon Laboratories Inc, SI5368C-B-GQ Datasheet - Page 28
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SI5368C-B-GQ
Manufacturer Part Number
SI5368C-B-GQ
Description
IC ANY-RATE MULTI/ATTEN 100TQFP
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Specifications of SI5368C-B-GQ
Number Of Circuits
1
Package / Case
100-TQFP, 100-VQFP
Pll
Yes with Bypass
Input
Clock
Output
CML, CMOS, LVDS, LVPECL
Ratio - Input:output
4:5
Differential - Input:output
Yes/Yes
Frequency - Max
346MHz
Divider/multiplier
No/Yes
Voltage - Supply
1.62 V ~ 2.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
346MHz
Maximum Input Frequency
710 MHz
Minimum Input Frequency
0.002 MHz
Output Frequency Range
0.002 MHz to 1417 MHz
Supply Voltage (max)
2.75 V
Supply Voltage (min)
1.62 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI5368C-B-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Si5368
Reset value = 0000 0000
28
Register 10.
Name
Type
Bit
7:6
Bit
5
4
3
2
1
0
DSBL3_REG DSBL3_REG.
DSBL2_REG DSBL2_REG.
DSBL1_REG DSBL1_REG.
Reserved
Reserved
DSBL5_
DSBL4_
Name
D7
REG
REG
Reserved
R
Reserved.
DSBL5_REG.
This bit controls the powerdown and disable of the CKOUT5 output buffer. If disable
mode is selected, the NC5_LS output divider is also powered down.
0: CKOUT5 enabled.
1: CKOUT5 disabled.
Reserved.
DSBL4_REG.
This bit controls the powerdown and disable of the CKOUT4 output buffer. If disable
mode is selected, the NC4 output divider is also powered down.
0'b=CKOUT4 enabled
1'b=CKOUT4 disabled
This bit controls the powerdown and disable of the CKOUT3 output buffer. If disable
mode is selected, the NC3 output divider is also powered down.
0: CKOUT3 enabled
1: CKOUT3 disabled
This bit controls the powerdown and disable of the CKOUT2 output buffer. If disable
mode is selected, the NC2 output divider is also powered down.
0: CKOUT2 enabled
1: CKOUT2 disabled
This bit controls the powerdown and disable of the CKOUT1 output buffer. If disable
mode is selected, the NC1 output divider is also powered down.
0: CKOUT1 enabled
1: CKOUT1 disabled
D6
DSBL5_
REG
R/W
D5
Preliminary Rev. 0.41
Reserved
D4
R
DSBL4_
Function
REG
R/W
D3
DSBL3_
REG
R/W
D2
DSBL2_
REG
D1
R
DSBL1_
REG
D0
R