ICS951462AGLF IDT, Integrated Device Technology Inc, ICS951462AGLF Datasheet
ICS951462AGLF
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ICS951462AGLF Summary of contents
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Integrated Circuit Systems, Inc. Programmable System Clock Chip for ATI RS/RD690 - K8 Recommended Application: ATI RS/RD690 systems using AMD K8 processors & SB600 Southbridge Output Features: • pairs of CPU pairs • pairs of SRC ...
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Integrated Circuit Systems, Inc. Pin Description PIN # PIN NAME 1 GNDREF 2 VDDREF VDD48 6 48MHz_0 7 48MHz_1 8 GND48 9 SMBCLK 10 SMBDAT 11 RESET_IN# 12 SRCCLKT7 13 SRCCLKC7 14 VDDSRC 15 GNDSRC ...
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Integrated Circuit Systems, Inc. Pin Description (Continued) PIN # PIN NAME 33 *CLKREQC# 34 ATIGCLKC2 35 ATIGCLKT2 36 ATIGCLKC1 37 ATIGCLKT1 38 GNDATIG 39 VDDATIG 40 ATIGCLKC0 41 ATIGCLKT0 42 SRCCLKC1 43 SRCCLKT1 44 VDDSRC 45 GNDSRC 46 SRCCLKC0 47 ...
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Integrated Circuit Systems, Inc. General Description The ICS951462 is a main clock synthesizer chip that provides all clocks required for ATI RS/RD690-based systems. An SMBus interface allows full control of the device. Block Diagram X1 Xtal X2 Osc. FS(2:0) CLKREQA# ...
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Integrated Circuit Systems, Inc. Table1: CPU and HTT Frequency Selection Table Byte 0 Bit4 Bit3 Bit2 Bit1 Bit0 CPU CPU CPU CPU CPU SS_EN FS3 FS2 FS1 FS0 ...
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Integrated Circuit Systems, Inc. Table2: SRC Frequency Selection Table Byte 0 Byte 5 Bit 5 Bit3 Bit2 Bit1 Bit0 SRC SRC SRC SRC SRC SS_EN FS3 FS2 FS1 FS0 ...
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Integrated Circuit Systems, Inc. Table3: ATIG Frequency Selection Table Byte 9 Byte 0 Bit 6 Bit3 Bit2 Bit1 Bit0 ATIG ATIG ATIG ATIG ATIG SS_EN FS3 FS2 FS1 FS0 ...
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Integrated Circuit Systems, Inc. Table 4: CPU Divider Ratios B19b(7:4) 00 Bit 00 0000 01 0001 10 0010 11 0011 LSB Address Table 5: HTT Divider Ratios B20b(3:0) 00 Bit 00 0000 01 0001 10 0010 11 0011 Address LSB ...
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Integrated Circuit Systems, Inc. General SMBus serial interface information for the ICS951462 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends the ...
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Integrated Circuit Systems, Inc. SMBus Table: Spread Spectrum Enable and CPU Frequency Select Register Byte 0 Pin # Name - FS Source Bit 7 - ATIG SS_EN Bit 6 - SRC SS_EN Bit 5 - CPU SS_EN Bit 4 - ...
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Integrated Circuit Systems, Inc. SMBus Table: CLKREQA# and CLKREQC# Output Control Register Byte 4 Pin # Name 12,13 REQASRC7 Bit 7 Bit 6 16,17 REQASRC6 18,19 REQASRC5 Bit 5 Bit 4 43,42 REQCSRC1 Bit 3 35,34 REQCATIG2 Bit 2 37,36 ...
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Integrated Circuit Systems, Inc. SMBus Table: Byte Count Register Byte 8 Pin # Name - BC7 Bit 7 - BC6 Bit 6 - BC5 Bit 5 - BC4 Bit 4 - BC3 Bit 3 - BC2 Bit 2 - BC1 ...
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Integrated Circuit Systems, Inc. SMBus Table: CPU PLL Spread Spectrum Control Register Byte 13 Pin # Name - SSP7 Bit 7 - SSP6 Bit 6 - SSP5 Bit 5 - SSP4 Bit 4 - SSP3 Bit 3 - SSP2 Bit ...
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Integrated Circuit Systems, Inc. SMBus Table: ATIG PLL Spread Spectrum Control Register Byte 18 Pin # Name Bit 7 - SSP14 Bit 6 - SSP13 Bit 5 - SSP12 Bit 4 - SSP11 Bit 3 - SSP10 Bit 2 - ...
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Integrated Circuit Systems, Inc. Absolute Maximum Rating (Above which useful life may be impaired) PARAMETER SYMBOL 3.3V Core Supply Voltage VDD_A 3.3V Logic Input Supply VDD_In Voltage Storage Temperature Ts Ambient Operating Temp Tambient Max Junction Temp T J Case ...
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Integrated Circuit Systems, Inc. Electrical Characteristics - K8 Push Pull Differential Pair 70° 3.3 V +/-5%; C =AMD64 Processor Test Load PARAMETER SYMBOL δV/δt Rising Edge Rate δV/δt Falling Edge Rate ...
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Integrated Circuit Systems, Inc. Electrical Characteristics - HTTCLK Clock PARAMETER SYMBOL Long Accuracy ppm T PCI33 Clock period period HTT66 Clock period T period V Output High Voltage V Output Low Voltage I Output High Current OH Output Low Current ...
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Integrated Circuit Systems, Inc. Electrical Characteristics - USB - 48MHz PARAMETER SYMBOL Long Accuracy ppm Clock period T period Clock Low Time T low Clock High Time T high Output High Voltage V OH Output Low Voltage V OL Output ...
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Integrated Circuit Systems, Inc. RESET_IN# - Assertion (transition from '1' to '0') Asserting RESET_IN pin stops all the outputs including CPU, SRC, ATIG, PCI and USB with the REF[2:0] running. The pin is a Schmitt trigger input with debouncing. After ...
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Integrated Circuit Systems, Inc. Common Recommendations for Differential Routing L1 length, Route as non-coupled 50 ohm trace. L2 length, Route as non-coupled 50 ohm trace. L3 length, Route as non-coupled 50 ohm trace Down Device Differential Routing L4 ...
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Integrated Circuit Systems, Inc. Shared Pin Operation - Input/Output Pins The I/O pins designated by (input/output) on the ICS951462 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that ...
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Integrated Circuit Systems, Inc INDEX INDEX AREA AREA Ordering Information 951462yGLFT Example: XXXX 1094J—03/16/09 c SYMBOL ...
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Integrated Circuit Systems, Inc. Revision History Rev. Issue Date Description 0.0 4/7/2005 Initial Release 0.1 4/15/2005 Added Timing Diagram 1. SMBus Byte 5 bits[6:5] are changed from CPU_STOP Enable to RESERVED. 0.2 6/6/2005 2. Updated LF Ordering Information from "Annealed ...