ICS501MT IDT, Integrated Device Technology Inc, ICS501MT Datasheet - Page 3

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ICS501MT

Manufacturer Part Number
ICS501MT
Description
IC PLL CLK MULTIPLIER 8-SOIC
Manufacturer
IDT, Integrated Device Technology Inc
Series
LOCO™r
Type
Clock Generatorr
Datasheet

Specifications of ICS501MT

Pll
Yes
Input
Clock, Crystal
Output
CMOS
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
No/No
Frequency - Max
160MHz
Divider/multiplier
No/Yes
Voltage - Supply
3 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC
Frequency-max
160MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
501MT

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Manufacturer
Quantity
Price
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Manufacturer:
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External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the ICS501
must be isolated from system power supply noise to perform
optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and the GND. It must be connected close to
the ICS501 to minimize lead inductance. No external power
supply filtering is required for the ICS501.
Series Termination Resistor
A 33 terminating resistor can be used next to the CLK pin
for trace lengths over one inch.
Absolute Maximum Ratings
Recommended Operation Conditions
IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER
ICS501
LOCO™ PLL CLOCK MULTIPLIER
Stresses above the ratings listed below can cause permanent damage to the ICS501. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Soldering Temperature
Parameter
Ambient Operating Temperature (commercial)
Ambient Operating Temperature (industrial)
Power Supply Voltage (measured in respect to GND)
Item
3
Crystal Load Capacitors
The total on-chip capacitance is approximately 12 pF. A
parallel resonant, fundamental mode crystal should be
used. The device crystal connections should include pads
for small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally required
crystal load capacitance. Because load capacitance can
only be increased in this trimming process, it is important to
keep stray capacitance to a minimum by using very short
PCB traces (and no vias) between the crystal and device.
Crystal capacitors, if needed, must be connected from each
of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal (C
pF)*2. In this equation, C
Example: For a crystal with a 16 pF load capacitance, each
crystal capacitor would be 8 pF [(16-12) x 2 = 8].
Min.
+3.0
-40
0
7 V
-0.5 V to VDD+0.5 V
-40 to +85 C
-65 to +150 C
260 C
Typ.
Rating
L
= crystal load capacitance in pF.
+5.25
Max.
+70
85
ICS501
CLOCK MULTIPLIER
Units
V
C
C
REV R 051310
L
-12

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