SY87700VZC Micrel Inc, SY87700VZC Datasheet - Page 5

• Manufacturer Part Number: SY87700VZC
• Description: IC CLOCK/DATA REC 175MBPS 28SOIC
• Manufacturer: Micrel Inc
• Type: Clock and Data Recovery (CDR)r

Specifications of SY87700VZC

• Input: PECL, TTL
• Output: PECL, TTL
• Frequency - Max: 1.25GHz
• Voltage - Supply: 3.15 V ~ 3.45 V, 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Frequency-max: 1.25GHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Micrel, Inc.
Performance
proposed for SONET/SDH equipment defined by the Bellcore
Specifications: GR-253-CORE, Issue 2, December 1995 and
ITU-T Recommendations: G.958 document, when used with
differential inputs and outputs.
Input Jitter Tolerance
amplitude of sinusoidal jitter applied on the input signal that
causes an equivalent 1dB optical/electrical power penalty.
SONET input jitter tolerance requirement condition is the
input jitter amplitude which causes an equivalent of 1dB
power penalty.
M9999-073008
[e-mail] or [phone]
CHARACTERISTICS
The SY87700V PLL complies with the jitter specifications
Input jitter tolerance is defined as the peak-to-peak
OC/STS-N
0.40
Level
15
1.5
A
3
Figure 1. Input Jitter Tolerance
(Hz)
f0
10
f0
f1
(Hz)
30
f1
-20dB/decade
f2
Frequency
300
(Hz)
f2
f4
(kHz)
6.5
f3
-20dB/decade
ft
(kHz)
65
ft
5
Jitter Transfer
the output OC-N/STS-N signal to the jitter applied on the
input OC-N/STS-N signal versus frequency. Jitter transfer
requirements are shown in Figure 2.
Jitter Generation
not exceed .01 U.I. rms when a serial data input with no
jitter is presented to the serial data inputs.
Jitter transfer function is defined as the ratio of jitter on
The jitter of the serial clock and serial data outputs shall
-20
0.1
OC/STS-N
Level
3
Acceptable
Range
Figure 2. Jitter Transfer
Jitter Transfer (dB)
fc
(kHz)
130
fc
-20dB/decade
Frequency
(dB)
0.1
P
SY87700V