IDTCV115FPVG IDT, Integrated Device Technology Inc, IDTCV115FPVG Datasheet - Page 3

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IDTCV115FPVG

Manufacturer Part Number
IDTCV115FPVG
Description
IC FLEXPC CLK PROGR P4 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
FlexPC™r
Type
PC Clockr
Datasheet

Specifications of IDTCV115FPVG

Input
Crystal
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
CV115FPVG
PIN DESCRIPTION
IDTCV115F
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
Pin Number
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
1
2
3
4
5
6
7
8
9
CPUC2_ITP/ SRCC7
V
CPUT2_ITP/ SRCT7
TT
FS_B/ Test_Mode
PCIF0/ITP_EN
SRCC4_SATA
FS_C/Test_Sel
SRCT4_SATA
_P
V
DOT_96C
V
V
V
V
V
V
DOT_96T
WRGD
V
V
SRCC1
SRCC2
SRCC3
SRCC5
SRCC6
CPUC1
CPUC0
V
USB48
SRCT1
SRCT2
SRCT3
SRCT5
SRCT6
CPUT1
CPUT0
DD
DD
DD
DD
PCIF1
PCIF2
V
SS
Name
DD
DD
SS
SS
PCI2
PCI3
PCI4
IREF
SDA
DD
SS
V
V
V
_SRC
_SRC
_SRC
_SRC
_CPU
_PCI
_PCI
_PCI
_PCI
SS
SS
SS
_48
_48
#/P
WRDWN
Type
PWR
GND
GND
PWR
PWR
GND
PWR
GND
GND
PWR
GND
PWR
GND
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
I/O
IN
IN
IN
3.3V
GND
PCI clock
PCI clock
PCI clock
GND
3.3V
PCI clock, free running. CPU_2 select (sampled at V
PCI clock, free running
PCI clock, free running
3.3V
48MHz clock
GND
96MHz 0.7V current mode differential clock output
96MHz 0.7V current mode differential clock output
3.3V LVTTL input is a level-sensitive strobe used to latch the FS_A, FS_B, FS_C/TEST_SEL and
PCIF_0/ITP_EN inputs. After V
down (active high). Internal pull LOW.
Differential Serial reference clock
Differential Serial reference clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
GND
SATA clock
SATA clock
3.3V
GND
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
Differential Serial reference clock
3.3V
Selectable CPU or SRC differential clock output. ITP_EN=0 @ V
Selectable CPU or SRC differential clock output. ITP_EN=0 @ V
CPU frequency selection. Selects test mode if pulled above 2V when V
CPU frequency selection. In test mode, 1=Hi-Z, 0=REF/N.
Reference current for differential output buffer
GND
Host 0.7V current mode differential clock output
Host 0.7V current mode differential clock output
3.3V
Host 0.7V current mode differential clock output
Host 0.7V current mode differential clock output
SMBus data
3
TT
_P
WRGD
# assertion, becomes a real-time input for asserting power
Description
COMMERCIAL TEMPERATURE RANGE
TT
_P
WRGD
# assertion), HIGH = CPU_2.
TT
TT
_P
_P
WRGD
WRGD
TT
_P
# assertion = SRC_7
# assertion = SRC_7
WRGD
# is asserted.

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