DS26503L+ Maxim Integrated Products, DS26503L+ Datasheet - Page 15

IC T1/E1/J1 BITS ELEMENT 64-LQFP

DS26503L+

Manufacturer Part Number
DS26503L+
Description
IC T1/E1/J1 BITS ELEMENT 64-LQFP
Manufacturer
Maxim Integrated Products
Type
BITS Elementr
Datasheet

Specifications of DS26503L+

Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency-max
-
Output
-
Input
-
4.3 Receive Side
NAME
RCLK
RSER
RLOF
RLOS
RAIS
RS
TYPE
O
O
O
O
O
O
Receive Clock. Recovered 1.544MHz (T1), 2.048MHz (E1), or 6312kHz
(G.703 Synchronization Interface).
Receive Sync
T1/E1 Mode: An extracted pulse, one RCLK wide, is output at this pin that
identifies either frame (IOCR1.5 = 0) or multiframe (IOCR1.5 = 1)
boundaries. If set to output frame boundaries, then through IOCR1.6, RS can
also be set to output double-wide pulses on signaling frames in T1 mode.
6312kHz Mode: This pin will be in a high-impedance state.
Receive Serial Data
T1/E1 Mode: This is the received NRZ serial data updated on rising edges of
RCLK.
6312kHz Mode: This pin will be in a high-impedance state.
Receive Loss Of Frame. This output can be configured to be a Loss Of
Transmit Clock indicator via IOCR.4 when operating in T1 or E1 mode.
T1/E1 Mode: Set when the receive synchronizer is searching for frame
alignment (RLOF mode), or set when the signal at the TCLK pin has not
transitioned for approximately 15 periods of the scaled MCLK (LOTC mode).
6312kHz Mode: This pin will be in a high-impedance state.
Receive Loss Of Signal
T1 Mode: High when 192 consecutive zeros detected.
E1 Mode: High when 255 consecutive zeros detected.
6312kHz Mode: High when consecutive zeros detected for 65µs typically.
Receive Alarm Indication Signal
T1 Mode: Will toggle high when receive Blue Alarm is detected.
E1 Mode: Will toggle high when receive AIS is detected.
6312kHz Mode: This pin will be in a high-impedance state.
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FUNCTION

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