ICS854S202AYIT IDT, Integrated Device Technology Inc, ICS854S202AYIT Datasheet
ICS854S202AYIT
Specifications of ICS854S202AYIT
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ICS854S202AYIT Summary of contents
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DIFFERENTIAL-TO-LVDS MULTIPLEXER G D ENERAL ESCRIPTION The ICS854S202I is a 12:2 Differential-to-LVDS IC S Clock Multiplexer which can operate >3GHz and is a member of the HiPerClockS™ family of High HiPerClockS™ Perfor mance Clock Solutions from IDT. The ICS854S202I ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER ABLE IN ESCRIPTIONS CONTINUED ON NEXT PAGE ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER ABLE IN ESCRIPTIONS CONTINUED ON NEXT ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER T 3B. SEL_A ABLE ONTROL NPUT UNCTION ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER BSOLUTE AXIMUM ATINGS Supply Voltage Inputs, V -0. Outputs, I (LVDS) O Continuous Current 10mA Surge Current 15mA Package Thermal Impedance, JA Storage Temperature, T -65°C to 150°C ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER T 4D. LVDS DC C ABLE HARACTERISTICS ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER P ARAMETER V DD 3.3V±5% POWER SUPPLY LVDS + – Float GND 3.3V C /3. ORE UTPUT OAD EST Part 1 nQx Qx Part 2 nQy Qy tsk(pp ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER nCLK0: nCLK11 CLK0: CLK11 nQA, nQB QA PD1 nCLKy CLKy nQA, nQB QA PD2 tsk( PD1 I S NPUT KEW V DD LVDS DC Input IFFERENTIAL ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER R U ECOMMENDATIONS FOR NUSED I : NPUTS CLK/nCLK I : NPUT For applications not requiring the use of the differential input, both CLK and nCLK can be left floating. Though not required, but for additional ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER IFFERENTIAL LOCK NPUT NTERFACE The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and other differential signals. Both V SWING V and V input requirements. Figures show interface PP ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER 3.3V LVDS D T RIVER ERMINATION A general LVDS interface is shown in Figure 100 differential transmission line environment, LVDS drivers require a matched load termination of 100 3.3V IDT ™ / ICS ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER This section provides information on power dissipation and junction temperature for the ICS854S202I-01. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS854S202I-01 is the sum of the core ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER ABLE VS IR LOW ABLE FOR JA Multi-Layer PCB, JEDEC Standard Test Boards T C RANSISTOR OUNT The transistor count for ICS854S202I is: 8,485 IDT ™ / ICS ™ LVDS ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER ACKAGE UTLINE UFFIX FOR ABLE S Y Reference Document: JEDEC Publication 95, MS-026 IDT ™ / ICS ™ LVDS MULTIPLEXER LQFP EAD D ACKAGE IMENSIONS J ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER ABLE RDERING NFORMATION ...
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ICS854S202I 12:2, DIFFERENTIAL-LVDS MULTIPLEXER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 ...