EK43602-01 Peregrine Semiconductor, EK43602-01 Datasheet
EK43602-01
Specifications of EK43602-01
Related parts for EK43602-01
EK43602-01 Summary of contents
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... RF Digital Attenuator 6-bit, 31.5 dB, 9 kHz - 5.0 GHz Features due to on-board DD RF Output P/S ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Product Specification PE43602 HaRP™-enhanced UltraCMOS™ device Attenuation: 0.5 dB steps to 31.5-dB High Linearity: Typical +58 dBm IIP3 Excellent low-frequency performance 3 ...
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... Frequency (MHz) ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 3 5 Frequency 9 kHz ≤ 5 GHz 9 kHz < 4 GHz 4 GHz ≤ 5 GHz 4 GHz ≤ 5 GHz 9 kHz - 5 GHz All States 9 kHz - 5 GHz Input 20 MHz - 5 GHz 20 MHz - 5 GHz 1 MHz Figure 4 ...
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... Frequency (GHz) 0dB 0.5dB 1dB 4dB 8dB 16dB 500 1000 1500 2000 2500 Frequency (MHz) ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. 2dB 31.5dB 2dB 31.5dB 2dB 31.5dB 3000 3500 4000 4500 Page ...
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... The PE43602 has a maximum 25 kHz switching rate. Switching rate is defined to be the speed at which the DSA can be toggled across attenuation states. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Table 3. Operating Ranges Parameter Min V Power Supply Voltage 3 ...
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... Attenuation Word: Multiply by 4 and convert to binary → 12.5 dB → 50 → 00110010 Serial Input: 00110010 Document No. 70-0248-05 │ www.psemi.com Table 8. Serial Attenuation Word Truth Table Function Attenuation Setting D1 RF1-RF2 L Reference I. 31.5 dB LSB (first in ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Attenuation Word (LSB ...
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... Serial data is clocked in LSB first. The shift register must be loaded while LE is held LOW to prevent the attenuator value from changing ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page data is entered. The LE input should then be toggled HIGH and brought LOW again, latching the new data into the DSA ...
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... T 100 - ns 100 - ns 100 - ns T 100 - ns 100 - ns 100 - ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. T DIH T PSIH T LESU T LEPW T PD VALID Characteristics < 85° C, unless otherwise specified A Parameter Min Latch Enable minimum LEPW pulse width Parallel data setup time DISU T Parallel data hold time ...
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... Parallel is selected in the software. For manual latched-parallel programming, the procedure is identical to direct-parallel except now the LE pin on the Serial header must be logic low ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Figure 17. Evaluation Board Layout Peregrine Specification 101-0310 Note: Reference Figure 18 for Evaluation Board Schematic as the parallel bits are applied ...
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... VDD P/S 3 S/P U1 C14 4 GND 100pF 43X0X DSA 50 Ohm 4x4 MLP24 5 RF1 J4 6 GND Z=50 Ohm SMA 1 SERIAL HEADER 4 CLK 1 CLOCK DATA 2 DATA GND CLK GND J5 14 RF2 SMA 13 1 GND Z=50 Ohm ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page ...
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... YYWW = Date Code ZZZZZ = Last five digits of Lot Number Table 12. Ordering Information Order Code Part Marking PE43602 MLI 43602 PE43602G-24QFN 4x4mm-75A PE43602 MLI-Z 43602 PE43602G-24QFN 4x4mm-3000C EK43602-01 PE43602 -EK ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page Tape Feed Direction 4.35 ...
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... Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. ©2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page ...