4302-00 Peregrine Semiconductor, 4302-00 Datasheet - Page 5

• Manufacturer Part Number: 4302-00
• Description: KIT EVAL FOR 4302 RF DSA
• Manufacturer: Peregrine Semiconductor
• Series: UltraCMOS™r
• Type: Attenuatorr

Specifications of 4302-00

• Frequency: 0Hz ~ 4GHz
• For Use With/related Products: PE4302
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1046-1001; 4302-0

PE4302
Product Specification
Figure 14. Pin Configuration (Top View)
Table 2. Pin Descriptions
Note 1: Both RF ports must be held at 0 V
Document No. 70-0056-04 │ www.psemi.com
Paddle
Pin
No.
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
Clock
3: Connect pin 12 to GND to enable internal negative voltage
4. Place a 10 kΩ resistor in series, as close to pin as possible to
2: Latch Enable (LE) has an internal 100 kΩ resistor to V
Data
RF1
C16
external series capacitor.
generator. Connect pin 12 to V
disable internal negative voltage generator.
avoid frequency resonance.
LE
V
Name
1
2
3
4
5
PUP1
PUP2
Clock
ss
GND
Data
GND
GND
GND
C0.5
C16
RF1
RF2
Pin
V
V
P/S
LE
/GND
C8
C4
C2
C1
DD
DD
20-lead QFN
Exposed Solder Pad
4x4mm
Attenuation control bit, 16dB (Note 4).
RF port (Note 1).
Serial interface data input (Note 4).
Serial interface clock input.
Latch Enable input (Note 2).
Power supply pin.
Power-up selection bit, MSB.
Power-up selection bit, LSB.
Power supply pin.
Ground connection.
Ground connection.
Negative supply voltage or GND
connection(Note 3)
Parallel/Serial mode select.
RF port (Note 1).
Attenuation control bit, 8 dB.
Attenuation control bit, 4 dB.
Attenuation control bit, 2 dB.
Ground connection.
Attenuation control bit, 1 dB.
Attenuation control bit, 0.5 dB.
Ground for proper operation
SS
Description
DC
(-VDD) to bypass and
15
14
13
12
11
or DC blocked with an
C8
RF2
P/S
Vss/GND
GND
DD.
Table 3. Absolute Maximum Ratings
Exceeding absolute maximum ratings may cause per-
manent damage. Operation should be restricted to the
limits in the Operating Ranges table. Operation be-
tween operating range maximum and absolute maxi-
mum for extended periods may reduce reliability.
Table 4. Operating Ranges
Exposed Solder Pad Connection
The exposed solder pad on the bottom of the package
must be grounded for proper device operation.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rate specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™ de-
vices are immune to latch-up.
Switching Frequency
The PE4302 has a maximum 25 kHz switching rate.
Resistor on Pin 1 & 3
A 10 kΩ resistor on the inputs to Pin 1 & 3 (see Figure
16) will eliminate package resonance between the RF
input pin and the two digital inputs. Specified
attenuation error versus frequency performance is
dependent upon this condition.
V
Voltage
I
Current
Digital Input High
Digital Input Low
Digital Input Leakage
Input Power
Temperature range
DD
Symbol
DD
Power Supply
V
V
T
Power Supply
©2003-2008 Peregrine Semiconductor Corp. All rights reserved.
P
V
ESD
DD
ST
IN
Parameter
I
Power supply voltage
Voltage on any DC input
Storage temperature range
Input power (50Ω)
ESD voltage (Human Body
Model)
Parameter/Conditions
0.7xV
Min
-40
2.7
DD
Typ
3.0
Min
-0.3
-0.3
-65
0.3xV
Max
+24
100
3.3
85
1
Max
V
150
+30
500
4.0
0.3
DD
DD
Page 5 of 11
+
Units
dBm
dBm
Units
µA
µA
°C
V
V
V
°C
V
V
V