TLE6288RNT Infineon Technologies, TLE6288RNT Datasheet - Page 16

• Manufacturer Part Number: TLE6288RNT
• Manufacturer: Infineon Technologies

Specifications of TLE6288RNT

• Switch Type: High Side/Low Side
• Power Switch Family: TLE 6288 R
• Power Switch On Resistance: 150mOhm
• Number Of Outputs: 6
• Mounting: Surface Mount
• Supply Current: 10mA
• Package Type: DSO
• Operating Temperature (min): -40C
• Operating Temperature (max): 150C
• Operating Temperature Classification: Automotive
• Propagation Delay Time: 200ns
• Pin Count: 36
• Power Dissipation: 800mW
• Lead Free Status / RoHS Status: Compliant

edge (if CLKProg = L; rising edge if CLKProg = H) of serial clock. It is essential that the SCLK pin is in a logic high
state (if CLKProg = L; low state if CLKProg = H) whenever chip select CS makes any transition.
SI - Serial Input. Serial data bits are shifted in at this pin, the most significant bit (MSB) first. SI information is read
in on the rising edge of SCLK (if CLKProg = L; falling edge if CLKProg = H). Input data is latched in the SPI shift
register and then transferred to the internal registers of the logic.
The input data consists of 16 bits, made up of 4 control bits and 12 data bits. The control word is used to program
the device, to operate it in a certain mode as well as providing diagnostic information (see
SO - Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant bit (MSB) first. SO
is in a high impedance state until the CS pin goes to a logic low state. New diagnostic data will appear at the SO
pin following the falling edge of SCLK (if CLKProg = L; rising edge if CLKProg = H).
5.2
Electrical Characteristics: SPI Timing
V
ground, positive current flowing into pin (unless otherwise specified)
Pos.
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.2.9
Data Sheet
CC
= 4.5 V to 5.5 V,
Parameter
Serial Clock Frequency
(depending on SO load)
Serial Clock Period (1/
Serial Clock High Time
Serial Clock Low Time
Enable Lead Time
(falling edge of CS to falling
edge of SCLK)
Enable Lead Time
(falling edge of CS to rising
edge of SCLK)
Enable Lag Time (rising edge
of SCLK to rising edge of CS)
Enable Lag Time (falling edge
of SCLK to rising edge of CS)
Data Setup Time (required
time SI to rising of SCLK)
Data Setup Time (required
time SI to falling of SCLK)
Data Hold Time (rising edge of
SCLK to SI)
Data Hold Time (falling edge of
SCLK to SI)
Disable Time
Electrical Characteristics: SPI Timing
T
1)
j
= -40 °C to +150 °C,
f
SCLK
)
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
SCLK
p(SCLK)
SCLKH
SCLKL
leadL
leadH
lagL
lagH
SUL
SUH
HL
HH
DIS
V
B
= 6 V to 16 V, Reset = H,
Min.
DC
200
50
50
200
200
200
200
20
20
20
20
–
16
Limit Values
Typ.
–
–
–
–
–
–
–
–
–
–
–
–
–
Max.
5
–
–
–
–
–
–
–
–
–
–
–
200
V
DO
=
Unit Pin/
MHz –
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
CC
, all voltages with respect to
Comment
–
–
–
–
–
–
–
–
–
–
–
–
Chapter
Rev. 2.4, 2007-08-08
Conditions
–
–
–
–
CLKProg = L
CLKProg = H
CLKProg = L
CLKProg = H
CLKProg = L
CLKProg = H
CLKProg = L
CLKProg = H
–
TLE6288R
5.5).
SPI