74F283D-T NXP Semiconductors, 74F283D-T Datasheet - Page 4

• Manufacturer Part Number: 74F283D-T
• Manufacturer: NXP Semiconductors

Specifications of 74F283D-T

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
Figure A shows how to make a 3-bit adder. Tying the operand inputs
of the fourth adder (A3, B3) Low makes 3 dependent only on, and
equal to, the carry from the third adder. Using somewhat the same
principle, Figure B shows a way of dividing the 74F283 into a 2-bit
and a 1-bit adder. The third stage adder (A2, B2, 2) is used as
means of getting a carry (C10) signal into the fourth stage adder (via
A2 and B2) and bringing out the carry from the second stage on 2.
Note that as long as A2 and B2 are the same, whether High or Low,
APPLICATIONS
1989 Mar 03
4-bit binary full adder with fast carry
C
C
IN
IN
A0 B0 A1 B1 A2 B2 A3 B3
A0 B0 A1 B1 A2 B2 A3 B3
I0
C.
2
I1
0
0
0
A.
L
5-input Encoder
2
1
1
1
3-bit Adder
2
2
2
2
I2
3
3
I3
C
C
OUT
OUT
I4
C3
L
4
C
IN
they do not influence 2. Similarly, when A2 and B2 are the same,
the carry into the third stage does not influence the carry out of the
third stage. Figure C shows a method of implementing a 5-input
encoder where the inputs are equally weighted. The outputs 0, 1
and 2 present a binary number of inputs I0–I4 that are true.
Figure D shows one method of implementing a 5-input majority gate.
When three or more of the inputs I0–I4 are true, the output M4 is
true.
C
C
IN
IN
D.
A0 B0 A1 B1
A0 B0 A1 B1 A2 B2 A3 B3
B.
A0 B0 A1 B1 A2 B2 A3 B3
I0
I1
0
0
0
5-input Majority Gate
2-bit and 1-bit Adder
1
1
1
C2
M4
2
2
C10
I2
10
3
3
A10 B10
I3
C
C
OUT
OUT
I4
SF00856
C
11
Product specification
74F283