5962-8984105LA E2V, 5962-8984105LA Datasheet - Page 2
5962-8984105LA
Manufacturer Part Number
5962-8984105LA
Description
Manufacturer
E2V
Datasheet
1.5962-8984105LA.pdf
(21 pages)
Specifications of 5962-8984105LA
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DEFENSE SUPPLY CENTER COLUMBUS
DSCC FORM 2234
APR 97
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits
in accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Supply voltage range -------------------------------------------------------
Input voltage applied ------------------------------------------------------
Off-state output voltage applied -----------------------------------------
Storage temperature range (TSTG) ------------------------------------
Maximum power dissipation (PD) 2/ -----------------------------------
Lead temperature (soldering, 10 seconds) (TSOL) ----------------
Thermal resistance, junction-to-case (ΘJC) -------------------------
Junction temperature (TJ) -------------------------------------------------
Data retention-----------------------------------------------------------------
Endurance --------------------------------------------------------------------
_______________
1/ Minimum voltage is -0.5 V which may undershoot to -2.5 V for pulses of less than 20 ns.
2/ Must withstand the added PD due to short circuit test; e.g., IOS.
COLUMBUS, OHIO 43216-5000
01, 07
02, 08
03, 09
04, 10
05, 11
06, 12
13
14
MICROCIRCUIT DRAWING
Outline letter
Drawing number
K
L
3
5962-89841
STANDARD
Generic number
22V10
22V10
22V10
22V10
22V10
22V10
22V10L
22V10L
GDFP2-F24 or CDFP3-F24
GDIP3-T24 or CDIP4-T24
CQCC1-N28
Descriptive designator
22-input, 10-output, EECMOS, architecturally
generic, programmable AND-OR array
22-input, 10-output, EECMOS, architecturally
generic, programmable AND-OR array
22-input, 10-output, EECMOS, architecturally
generic, programmable AND-OR array
22-input, 10-output, EECMOS, architecturally
generic, programmable AND-OR array
22-input, 10-output, EECMOS, architecturally
generic, programmable AND-OR array (higher tCO,
lower fCLK2)
22-input, 10-output, EECMOS, architecturally
generic, programmable AND-OR array
22-input, 10-output, EECMOS, architecturally
generic, programmable AND-OR array
22-input, 10-output, EECMOS, architecturally
generic, programmable AND-OR array
Device type
(see 1.2.1)
01
Circuit function
SIZE
A
Case outline
(see 1.2.2)
Terminals
REVISION LEVEL
-0.5 V dc to +7.0 V dc
-0.5 V dc to VCC +1.0 V dc 1/
-0.5 V dc to VCC +1.0 V dc 1/
-65 C to +150 C
1.5 W
+260 C
See MIL-STD-1835
+175 C
10 years (minimum)
100 erase/write cycles (minimum)
24
24
28
K
J
Package style
flat pack
dual-in-line
square chip carrier
Lead finish
(see 1.2.3)
X
SHEET
Access time
30
20
15
25
15
10
25
20
5962-89841
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