SAA7113H/V2,557 Trident Microsystems, Inc., SAA7113H/V2,557 Datasheet - Page 11

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SAA7113H/V2,557

Manufacturer Part Number
SAA7113H/V2,557
Description
Manufacturer
Trident Microsystems, Inc.
Datasheet

Specifications of SAA7113H/V2,557

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Part Number
Manufacturer
Quantity
Price
Part Number:
SAA7113H/V2,557
Manufacturer:
Sigma Designs Inc
Quantity:
10 000
Philips Semiconductors
9397 750 14232
Product data sheet
8.3 Chrominance processing
The 9-bit chrominance signal is fed to the multiplication inputs of a quadrature
demodulator, where two subcarrier signals from the local oscillator DTO1 are applied (0
and 90 phase relationship to the demodulator axis). The frequency is dependent on the
present color standard. The output signals of the multipliers are low-pass filtered (four
programmable characteristics) to achieve the desired bandwidth for the color difference
signals (PAL and NTSC) or the 0 and 90 FM signals (SECAM).
The color difference signals are fed to the Brightness/Contrast/Saturation block (BCS),
which includes the following five functions:
Fig 8. Clamp and gain flow
Automatic Gain Control (AGC) for chrominance PAL and NTSC
Chrominance amplitude matching (different gain factors for (R
achieve ITU-R BT 601 levels C
Chrominance saturation control
Luminance contrast and brightness
Limiting YUV to the values 1 (minimum) and 254 (maximum) to fulfil ITU-R BT 601
requirements.
NO BLANKING ACTIVE
CLAMP
WIPE = white peak level (254);
SBOT = sync bottom level (1);
CLL = clamp level [60 Y (128 C)];
HSY = horizontal sync pulse;
HCL = horizontal clamp pulse.
1
CLL
CLAMP
0
1
Rev. 02 — 9 May 2005
HCL
<- CLAMP
NO CLAMP
ANALOG INPUT
1
0
VBLK
ADC
R
and C
0
B
GAIN
for all standards)
0
SBOT
GAIN ->
1
1
GAIN
HSY
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
9-bit video input processor
fast
0
GAIN
SAA7113H
1
Y) and (B
WIPE
slow
0
mgc647
GAIN
Y) to
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