MCIMX351AVM4B Freescale, MCIMX351AVM4B Datasheet - Page 45

• Manufacturer Part Number: MCIMX351AVM4B
• Manufacturer: Freescale

Specifications of MCIMX351AVM4B

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

1
2
3
4
5
6
7
8
9
Note: All configuration parameters (CSA, CSN, WBEA, WBEN, LBA, LBN, OEN, OEA, RBEA, and RBEN) are in cycle units.
Freescale Semiconductor
Ref No.
WE40A
WE41A
(muxed
(muxed
WE41
WE42
WE43
WE44
WE45
WE46
WE47
WE48
For the value of parameters WE4–WE21, see column BCD = 0 in
CS Assertion. This bit field determines when the CS signal is asserted during read/write cycles.
CS Negation. This bit field determines when the CS signal is negated during read/write cycles.
BE Assertion. This bit field determines when the BE signal is asserted during read cycles.
BE Negation. This bit field determines when the BE signal is negated during read cycles.
Output maximum delay from internal driving ADDR/control FFs to chip outputs.
Output maximum delay from CS[x] internal driving FFs to CS[x] out.
DATA maximum delay from chip input data to its internal FF.
A/D)
A/D)
DTACK maximum delay from chip dtack input to its internal FF.
Table 32. WEIM Asynchronous Timing Parameters Relative Chip Select Table (continued)
CS[x] valid to Output Data valid
CS[x] valid to Output Data valid
Input Data valid to CS[x] invalid MAXCO – MAXCSO + MAXDI
CS[x] valid to BE[y] valid (write
CS[x] Invalid to DTACK invalid
DTACK valid to CS[x] invalid
Output Data invalid to CS[x]
BE[y] invalid to CS[x] invalid
CS[x] invalid to Input Data
CS[x] valid to LBA invalid
(write access)
Parameter
access)
Invalid
invalid
i.MX35 Applications Processors for Automotive Products, Rev. 9
WE14 – WE6 + (LBN + LBA + 1
WE12 – WE6 + (WBEA – CSA)
WE7 – WE13 + (WBEN – CSN)
MAXCO – MAXCSO + MAXDTI
WLBA + ADH + 1 – WCSA)
Synchronous Measured
WE16 – WE6 + (WLBN +
WE16 – WE6 – WCSA
WE17 – WE7 – CSN
Determination By
Parameters
– CSA)
0
0
1
Table
31.
–3 + (LBN + LBA +
MAXCSO
MAXCSO
MAXCO
MAXCO
MAXDTI
1 – CSA)
MAXDI
Min
—
—
—
—
—
0
0
6
6 –
8
7
7
9
–
+
+
3 + (WLBN + WLBA +
3 + (LBN + LBA + 1 –
–3 + (WBEN – CSN)
supported by SoC)
3 + (WBEA – CSA)
ADH + 1 – WCSA)
(If 133 MHz is
3 – WCSA
3 – CSN
CSA)
Max
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
45