SP000014123 Infineon Technologies, SP000014123 Datasheet - Page 6

• Manufacturer Part Number: SP000014123
• Manufacturer: Infineon Technologies

Specifications of SP000014123

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Pin description:
Low Quiescent current mode (Sleep mode) : By SPI Command the device can be set to Sleep
mode. In this mode all outputs are turned off, the diagnosis and biasing is disabled, the diagnosis and
the on/off register are reseted and the current consumption drastically reduced. A wake up is done by
sending a wake up command by SPI. A specified time (t
tional. The configuraton register (exception channel on/off register) values are not influenced by the
sleep mode. After wake up the outputs are Off, except the outputs are controlled by parallel inputs.
Overload Protection: The IC can be programmed to react in different ways to overload.
Current limit 1: In this mode the IC active limits the current to the specified “Current Limit 1”. If the cur-
rent limitation is active for longer than the fault filtering time this fault is reported and stored in the Fault
register.
Current limit 2: If this current limit is active for more than the specified “Overload switch off delay time”
the affected channel is turned off and the fault is reported and stored in the fault register. To turn on the
channel again this overload latch has to be reset before with an L
(parallel /SPI depending on the programmed operation).
The two operation modes can be changed during operation of the channel.
OUTPUT 1,2 – Drain pins of the two channels. Output pins and connected to the load.
GND – Ground pins.
IN 1,2 – Parallel Input Pins of the two channels
IS / Fault / ST1 –Configurable output pin. Depending on the configuration (done by SPI command) it
has three basic functions:
VS – Logic Supply pin. Used to supply the integrated circuitry.
CS – Chip Select of the SPI (low active)
SO / ST2 – Configurable output pin. Depending on the configuration (done by SPI command) it has two
functions:
SI – Signal Input of the Serial Peripheral Interface. The pin has an internal pull down structure.
SCKL – Clock Input of the Serial Peripheral Interface. The pin has an internal pull down structure
V2 Preliminary
a) General Fault pin. This is a general fault pin (open drain) which shows a high to low transi-
b) Sense Function. In this configuration the analog output signal represents the value of the
c) Status Output for channel 1: The Status output shows the same level as the input signal of
a) Signal Output of the Serial Peripheral Interface
b) Status Output for channel 2: The Status output shows the same level as the input signal of
channel 1 as long as there is no error and the inverted input signal when any kind of error
occurred at channel 1
channel 2 as long as there is no error and the inverted input signal when any kind of error
occurred at channel 2
tion as soon as an error is latched into the diagnosis register. When the diagnosis register is
cleared this flag is also reset (high state). This fault indication can be used to generate a µC
interrupt.
load current:
Sense Current proportional load current channel 1
Sense Current proportional load current channel 2
Sense Current proportional load current of both channels (I
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wake
Preliminary Datasheet TLE 6214 L
) after this command the IC is fully func-
H transition of the input signal
25.06.2003
D1
+ I
D2
)