ISP1181ABS NXP Semiconductors, ISP1181ABS Datasheet - Page 46

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ISP1181ABS

Manufacturer Part Number
ISP1181ABS
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1181ABS

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Compliant

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Philips Semiconductors
16. Power-on reset
9397 750 13959
Product data
The ISP1181A has an internal power-on reset (POR) circuit. Input pin RESET can be
directly connected to V
power-on and normally requires 3 to 4 ms to stabilize.
The triggering voltage of the POR circuit is 2.0 V nominal. A POR is automatically
generated when V
A hardware reset disables all USB endpoints and clears all ECRs, except for the
control endpoint which is fixed and always enabled.
(re-)initialize the endpoints.
Fig 14. Power-on reset timing.
t
t
t
(1) Supply voltage (5 V or 3.3 V), connected externally to pin RESET.
1
2
3
: clock is running
: BUS_CONF pins are sampled
: registers are accessible
V CC (1)
2.0 V
0 V
Rev. 05 — 08 December 2004
CC
goes below the trigger voltage for a duration longer than 50 s.
CC
50 s
. The clock signal on output CLKOUT starts 0.5 ms after
POR
350 s
t 1
1 ms
Full-speed USB peripheral controller
Section 9.3
t 2
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
1 ms
explains how to
ISP1181A
MGT026
t 3
45 of 70

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