CY7C66013-PVC Cypress Semiconductor Corp, CY7C66013-PVC Datasheet - Page 15

• Manufacturer Part Number: CY7C66013-PVC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C66013-PVC

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Not Compliant

For USB applications, the firmware should set the DSP to the appropriate location to avoid a memory conflict with RAM dedicated
to USB FIFOs. The memory requirements for the USB endpoints are described in the section on USB Device Endpoints on page
30. The assembly instructions to do this with two device addresses (0xD8) are shown below:
5.6
The CY7C66011/12/13 and CY7C66111/12/13 microcontrollers support three addressing modes for instructions that require data
operands: data, direct, and indexed.
5.6.1
“Data” address mode refers to a data operand that is actually a constant encoded in the instruction. As an example, consider the
instruction that loads A with the constant 0xD8:
This instruction will require two bytes of code where the first byte identifies the “MOV A” instruction with a data operand as the
second byte. The second byte of the instruction will be the constant “0xD8”. A constant may be referred to by name if a prior
“EQU” statement assigns the constant value to the name. For example, the following code is equivalent to the example shown
above:
5.6.2
“Direct” address mode is used when the data operand is a variable stored in SRAM. In that case, the one byte address of the
variable is encoded in the instruction. As an example, consider an instruction that loads A with the contents of memory address
location 0x10:
In normal usage, variable names are assigned to variable addresses using “EQU” statements to improve the readability of the
assembler source code. As an example, the following code is equivalent to the example shown above:
5.6.3
“Indexed” address mode allows the firmware to manipulate arrays of data stored in SRAM. The address of the data operand is
the sum of a constant encoded in the instruction and the contents of the “X” register. In normal usage, the constant will be the
“base” address of an array of data and the X register will contain an index that indicates which element of the array is actually
addressed:
This would have the effect of loading A with the fourth element of the SRAM “array” that begins at address 0x10. The fourth
element would be at address 0x13.
6.0
• MOV A,0D8h
• DSPINIT: EQU 0D8h
• MOV A,DSPINIT
• MOV A,[10h]
• buttons: EQU 10h
• MOV A,[buttons]
• array: EQU 10h
• MOV X,3
• MOV A,[X+array]
MOV A,D8h
SWAP A,DSP ; swap accumulator value into DSP register
Address Modes
Data (Immediate)
Direct
Indexed
Clocking
; Move D8 hex into Accumulator
XTALOUT
PRELIMINARY
Figure 6-1. Clock Oscillator On-Chip Circuit
(pin 1)
XTALIN
(pin 2)
15
30 pF
30 pF
to internal PLL
CY7C66011/12/13
CY7C66111/12/13