PDSP1882 OSRAM Opto Semiconductors Inc, PDSP1882 Datasheet - Page 11

• Manufacturer Part Number: PDSP1882
• Description: LED Displays 5x7 Super Red 0.18 , 8-CHARACTER
• Manufacturer: OSRAM Opto Semiconductors Inc
• Series: Alphanumeric Programmable Display™r

Specifications of PDSP1882

• Display Type: Dot Matrix
• Emitting Color: Hi-Eff. Red
• Number Of Digits: 8
• Digit Size (in): .18in
• Viewing Area Height (mm): 4.57mm
• Viewing Area Length (mm): 2.54mm
• Package Type: Panel
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Operating Temp Range: -40C to 85C
• Mounting: Through Hole
• Pin Count: 24
• Total Thickness (mm): 5.33mm
• Opto Display Type: Panel
• Pattern Type: Dot Matrix
• Millicandela Rating: 350µcd
• Size / Dimension: 1.69" L x 0.45" W x 0.21" H (42.93mm x 11.43mm x 5.33mm)
• Color: Red
• Configuration: 5 x 7
• Character Size: 0.18 in
• Illumination Color: High Efficiency Red
• Wavelength: 630 nm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Luminous Intensity: 350 ucd
• Viewing Area (w X H): 2.54 mm x 4.57 mm
• Lead Free Status / RoHS Status: Compliant
• Voltage - Forward (vf) Typ: -
• Internal Connection: -
• Lead Free Status / Rohs Status: Details
• Other names: Q68000A9107

Flash RAM
The Flash RAM allows the display to flash one or more of the char-
acters being displayed. The Flash Ram is accessed by setting FL
low. A4 and A3 are ignored. The Flash RAM is a 8 x 1 bit RAM with
each bit corresponding to a digit address. Digit 0 is on the left side
of the display and digit 7 is on the right side of the display. Address
lines, A2–A0 select the digit address with A2 being the most signif-
icant digit and A0 being the least significant digit. Data bit, D0, sets
and resets the flash bit for each digit. When D0 is high, the flash bit
is set; and when D0 is low, it is reset. See Table „Flash RAM
Access Logic“ (page 11).
Control Word
The Control Word is used to set up the attributes required by the
user. It is addressed by setting FL=1, A4=1, A3=0. The Control
Word is an 8 bit register and is accessed using data bits, D7–D0.
See Table „Control Word Access Logic“ (page 11) and Figure
„Control Word Data Definition“ (page 12) for the logic and attrib-
uted control. The Control Word has 5 functions. They are bright-
ness control, flashing character enable, blinking character
enable, self test, and clear (Flash and Character RAMS only).
Brightness Control
Control Word bits, D2–D0, control the brightness of the display
with a binary code of 000 being 100% brightness and 111 being
display blank. See Figure „Control Word Data Definition“
(page 12) for brightness level versus binary code. The average I
can be calculated by multiplying the 100% brightness level I
value by the display’s brightness level. For example, a display set
to 80% brightness with a 100% average I
have an average I
Flash Function
Control Word bit, D3, enables or disables the Flash Function.
When D3 is 1, the Flash Function is enabled and any digit with its
corresponding bit set in the Flash RAM will flash at approximately
2.0 Hz. When using an external clock, the flash rate can be deter-
mined by dividing the clock rate by 28,672. When D3 is 0, the
Flash Function is disabled and the contents of the Flash RAM is
ignored. For synchronized flashing on multiple displays, see the
Reset Section (page 12).
Flash RAM Access Logic
RST
1
1
Control Word Access Logic
RST
1
1
2006-03-30
CE
0
0
CE
0
0
CC
WR
0
1
WR
0
1
value of 200 mA x 80%=160 mA.
RD
1
0
RD
1
0
PDSP1880, PDSP1881, PDSP1882, PDSP1883, PDSP1884
FL
0
0
FL
1
1
CC
value of 200 mA will
A4
X
X
A4
1
1
A3
X
X
A3
0
0
CC
CC
A2
Flash RAM Address
for Digits 0–7
Flash RAM Address
for Digits 0–7
A2
Not used for Control
Word
Not used for Control
Word
11
Blink Function
Control Word bit, D4, enables or disables the Blink Function. When
D4 is 1, the Blink Function is enabled and all characters on the dis-
play will blink at approximately 2.0 Hz. The Blink Function will over-
ride the Flash Function if both functions are enabled. When D4 is
0, the Blink Function is disabled. When using an external clock, the
blink rate can be determined by dividing the clock rate by 28,672.
For synchronized blinking on multiple displays, see the Reset Sec-
tion (page 12).
UDC Character Map
Row Data
A2
0
0
0
0
1
1
1
Self Test
Control Word bits, D6 and D5, are used for the Self Test Function.
When D6 is 1, the Self Test is initiated. Results of the Self Test are
stored in bit D5. Control Word bit, D5, is a read only bit. When D5
is 1, Self Test has passed. When D5 is 0, Self Test failed is indi-
cated. The Self Test function of the IC consists of two internal rou-
tines which exercise major portions of the IC and illuminates all of
the LEDs. The first routine cycles the ASCII decoder ROM through
all states and performs a check sum on the out-put. If the check
sum is correct, D5 is set to a 1 (Pass).
A1
A1
A1
0
0
1
1
0
0
1
A0
A0
A0
0
1
0
1
0
1
0
Row #
1
2
3
4
5
6
7
D7 D6 D5 D4 D3 D2 D1 D0
D0=Flash Data, 0=Flash Off and 1=Flash On
(Write Cycle)
D0=Flash Data, 0=Flash Off and 1=Flash On
(Read Cycle)
D7 D6 D5 D4 D3 D2 D1 D0
Control Word data for a Write Cycle,
see Figure „Control Word Data Definition“
(page 12)
Control Word data for a Read during a
Read Cycle
Column Data
C1
D4
5 x 7
Dot Matrix
Pattern
C2
D3
C3
D2
C4
D1
C5
D0